ARRRRGGGHH RAM & FSB Speeds !!!!!

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HI all

This is my first post on this site so please be nice :)

Specs
MOBO = Gigabyte Quad Royal Nforce 4 SLI X16
CPU = P4 630 3.0 GHz 800FSB with HT
RAM = 2x1Gb DDR2 5300 (667)
GPU = Nvidia Geforce 6800 Ultra PCI-E

My CPU has a FSB of 800Mhz which I know means I have a real clock speed of 200Mhz as the Intel P4 send x4 clocks per cycle.

My RAM is DDR2 667 which means it has a real clock speed of 333 MHz.

My problems started when I decided to check whether my RAM MHz was actually running at 667 (real 333) or if the real 200MHz speed of the CPU was pulling the real ram speed back to 200MHz

I installed CPU-z and it reports that my RAM is running at 166 MHz which I assume is doubled up to a total of 333!!!

I have tried changing the RAM speed in the BIOS but it says it is already at 667 which must mean 333 real.
Also Gigabytes windows based program called easy tune also says the RAM is running at 667!

It is all very confusing and on top of this when I set the RAM modules up in DUAL mode for dual bandwidth the system crashes.

However my real question centres on the RAM speeds - based on my specs above does anyone see any reason why my RAM is not running at 333 MHz (667)

Perhaps there is another program to test Ram speeds out there?

Please help - thanks in advance
 
I think DDR-II operates a bit like the Pentium 4 FSB. For each clock cycle, it can compute up to 4 memory read/writes so it performs as if it were running 4 times faster. I would believe this means 166MHz -> 333MHz DDR-I -> 667MHz DDR-II.

You can read up on articles explaining how DDR-II works to make sure. I'm at work so there's now way I will do that research for you. *cough*Google*cough* ;)
 
Thanks very much for the answer

I have looked into this and there is a type of RAM that is X4 it is called QDR DRAM

DDR2 still send two !!

Any other ideas - is it possible I just have RAM that is no good ?
 
Taken from: DDR-II - How It Works
The key to DDR-II bandwidth is the core is running at 1/2 clock frequency of the I/O buffers - it follows that the data buffers are running at twice the frequency of the core. Add a DDR protocol and you are getting four transfers for each core clock cycle. With DDR and a 100MHz driven clock, the data buffers on the DDR DRAM device also run at 100MHz. The DDR principle then makes that 200MHz. With DDR-II the data buffers will run at 200MHz at the same driven clock. This allows them to essentially work on four bits of data per clock cycle, either read or written. Finally, apply the DDR concept to that, where it's done twice per clock, once on the rising edge and once on the falling edge, and you get an effective data frequency of 400MHz for that 100MHz initial clock frequency.

That's the essence of DDR-II. Here's it laid out simply.

DDR : 100MHz driven clock -> 100MHz data buffers -> DDR applied -> 200MHz final data frequency
DDR-II: 100MHz driven clock -> 200MHz data buffers -> DDR applied -> 400MHz final data frequency

The same essential principles still apply, memory timings are still in effect, but will take a different form from the current timings we've just become happy talking about with DDR DRAMs and memory devices.
I believe that explains it all.
 
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