IBM combination technique speeds PC chips

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Julio Franco

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Researchers at IBM have come up with a new approach to building transistors that could lead to faster, more energy-efficient chips in a few years.

The company has managed to combine both strained silicon and a silicon insulator into the same wafer. Strained silicon improves electron mobility, or the speed at which electrons can travel through silicon. Silicon insulators reduce leakage, or the amount of energy inadvertently dissipated, a major problem facing chip designers today. The combination design, which will begin to appear in chips later this year, can improve transistor performance by as much as 20 percent to 30 percent.

Read more: ZDNet.
 
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