Micron now sampling speedy 2GB Hybrid Memory Cubes

Shawn Knight

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Micron Technology is now shipping 2GB Hybrid Memory Cube engineering samples to select customers. Described as a dramatic step forward in memory technology, Micron’s Cube is the first to be shared broadly according to the company. But what exactly is a Hybrid Memory Cube, anyway?

A unique take on memory technology, Hybrid Memory Cubes consist of stacking multiple DRAM dies on top of each other and connecting them with a vertical conduit. Below the stack of memory (in this case, four 4GB DRAM dies) is a logic layer that adds intelligence to the array.

As The Tech Report points out, the Cube can then be soldered beside a processor or used in a DIMM-style module. Micron claims the solution provides an unprecedented 160GB/s of memory bandwidth and uses up to 70 percent less energy per bit compared to existing technologies – a metric that will dramatically lower a customer’s total cost of ownership.

For reference, Haswell’s GT3e integrated graphics uses 128MB of eDRAM on the same chip package as the CPU. Imagine what a system could do with 2GB of memory on tap with a 160GB/s pipeline.

Micron expects to source 4GB engineering samples in early 2014 with volume production of both 2GB and 4GB modules to get under way later in the year. Future generations, which will likely be even faster and more efficient, are expected to trickle down to consumer applications within three to five years, the company said.

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"Micron claims the solution provides an unprecedented 160GB/s of memory bandwidth and uses up to 70 percent less energy per bit compared to existing technologies – a metric that will dramatically lower a customer’s total cost of ownership."

Dramatically lower? Really? Isn't the power usage by memory dwarved by the power the CPU (and with gaming machines the GPU) uses? So what if the memory uses 70% less energy? Does it really have a big effect on the TOTAL cost of ownership? (Not saying that it isn't nice - just asking.)
 
Actually 70% is a fairly big deal. Even though memory dies don't dissipate anywhere near the wattage of a cpu die, the power dissipation limits how many dies can be stacked. Previous technology with interposers and inter-die bonds limited the stack size, but with TSV (if Micron is in fact demo'ing the long-sought after through-silicon via technology) the limit to stacking many dies becomes the wattage. Its no good stacking 15 dies if the inner 10 overheat after 4 hours of heavy throughput.

TSV has been a hard nut to crack but it seems like we'll start seeing products on the market soon.
 
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