TSMC to reportedly open a 5nm fabrication facility in 2020

[Scorpus]

While most chips are currently manufactured on a 14 or 16nm process, companies that own fabrication facilities are looking forward to a future of 10nm, 7nm and even 5nm designs.

TSMC, one of the major companies that fabricates chips, is expecting to roll out 5nm technology as early as the first half of 2020. The company also says that production of chips built using a 7nm process will begin in early 2018, which, if they're accurate in their estimations, means we could be looking at a 50% shrink of current fabrication tech in just over two years.

Developing a manufacturing process capable of sub-7nm lithography has been tricky, but TSMC believes the answer lies with extreme ultraviolet lithography (UAV). The company says they've made "significant progress" in using UAV, and they're expecting to roll out the technology for 5nm production.

Between now and the roll out of 7nm tech, TSMC is expected to tape out the first 10nm designs from its customers in the first quarter of 2016. A new 16nm FinFET Compact (FFC) process is also expected to become available this year, delivering better power consumption and cheaper manufacturing costs than the company's previous 16nm tech.

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https://www.techspot.com/news/63525-tsmc-reportedly-open-5nm-fabrication-facility-2020.html

 

[bexwhitt]

At 5nm silicon is 20 atoms (+-)wide, if they can make electronics that small (that work consistently) it's very impressive.

 

[Mr Majestyk]

At 5nm silicon is 20 atoms (+-)wide, if they can make electronics that small (that work consistently) it's very impressive.

Sorry but I call BS on TSMC claims. Even Intel is having problems with the 10nm and it's been delayed. The challenges at < 14nm are stupendous and quantum tunneling effects will be huge with sub 10nm line traces. Also what is their laser source for the lithography. Given TSMC has delayed the world for years in even delivering a sub 28nm lithography, I have no faith they can solve the 5nm puzzle in a mere 4 years. Keep dreaming boys.

 

[Jack007]

If what they said is true that they have made significant progress that means they have been holding it back for some time. I can just imagine chips made with 5nm architecture. It supposedly be approaching quantum speeds make computing like the speed of light and further progress so much more achievable

 

[Evernessince]

At 5nm silicon is 20 atoms (+-)wide, if they can make electronics that small (that work consistently) it's very impressive.

Sorry but I call BS on TSMC claims. Even Intel is having problems with the 10nm and it's been delayed. The challenges at < 14nm are stupendous and quantum tunneling effects will be huge with sub 10nm line traces. Also what is their laser source for the lithography. Given TSMC has delayed the world for years in even delivering a sub 28nm lithography, I have no faith they can solve the 5nm puzzle in a mere 4 years. Keep dreaming boys.

It'd be more willing to believe TSMC than Intel. We all well know that Intel will gouge any market it has a lead in and claim that it's become increasingly difficult. The Luxuries of having a Monopoly as the base of your business I guess.

 

[dividebyzero]

If what they said is true that they have made significant progress that means they have been holding it back for some time. I can just imagine chips made with 5nm architecture. It supposedly be approaching quantum speeds make computing like the speed of light and further progress so much more achievable

Comprehension is key. TSMC have said they would open a 5nm fab by 2020, not that 5nm products would be rolling off the assembly line. Chances are that one of the 28nm/20nm Gigafabs will be retooled for 5nm while the others transition to 10nm and it's half-node successor, 7nm. 10nm is currently undergoing test and validation with simple IC's.

Sorry but I call BS on TSMC claims. Even Intel is having problems with the 10nm and it's been delayed.

That is actually a problem with ASML's ramp of the lithography tooling. The prime reason why Intel, TSMC, and Samsung invested in ASML to ensure preferential supply.

The challenges at < 14nm are stupendous and quantum tunneling effects will be huge with sub 10nm line traces. Also what is their laser source for the lithography.

If you followed the process tech, you would already be aware that ASML have had their next generation litho tool roadmap in place for the best part of a year. Current NXE:3350B's (a little over $US100m a pop for those wondering) will be retrofitted for 10nm/7nm processes then phased out in mid-2017 as the next generation NXE:3400B's come onstream for 7nm/5nm.

[Source - PDF]

Given TSMC has delayed the world for years in even delivering a sub 28nm lithography, I have no faith they can solve the 5nm puzzle in a mere 4 years. Keep dreaming boys.

Can't fabricate chips if the tooling isn't there and the order book isn't paying the bills. TSMC's ramp of 20nm was actually pretty smooth (but unsuited for large TDP chips), it's 16nmFF process was ahead of Samsung's 14nmLPE (and provides the lions share of Apple's A9's), and its 16nmFF+ is comfortably ahead of Samsung's 14nmLPP.
All the semiconductor foundry players (excepting UMC and SMIC) announced their 20nm/sub-20nm processes some five years ago when the Common Platform abandoned gate first. If TSMC are slacking then what does that say about their direct competitors- Samsung, Globalfoundries, UMC, SMIC, and ST Micro ?

 

[Skidmarksdeluxe]

At 5nm silicon is 20 atoms (+-)wide, if they can make electronics that small (that work consistently) it's very impressive.

Sorry but I call BS on TSMC claims. Even Intel is having problems with the 10nm and it's been delayed. The challenges at < 14nm are stupendous and quantum tunneling effects will be huge with sub 10nm line traces. Also what is their laser source for the lithography. Given TSMC has delayed the world for years in even delivering a sub 28nm lithography, I have no faith they can solve the 5nm puzzle in a mere 4 years. Keep dreaming boys.

They've been struggling with the 14nm process for a long time now, yet they're bragging about rolling out 5nm in a few months time?... I agree, keep on dreaming folks.

 

[dividebyzero]

They've been struggling with the 14nm process for a long time now, yet they're bragging about rolling out 5nm in a few months time?... I agree, keep on dreaming folks.

TSMC don't have a 14nm process to struggle with. And as for "rolling out 5nm in a few months time", I'm not sure you have a grasp on process timetables. TSMC have said that they intend to begin roll out of product in 2020. Risk evaluation of simple pipecleaner products to volume production of complex IC's usually takes 3-4 years. For example Samsung began producing 14nmLPE product in early 2012 - a full three years before it actually shipped in a commercial product. If TSMC say 2020 for initial production, then 2023 is about the time they are planning on a viable yield commercial process.

 

[Skidmarksdeluxe]

TSMC don't have a 14nm process to struggle with. And as for "rolling out 5nm in a few months time", I'm not sure you have a grasp on process timetables. TSMC have said that they intend to begin roll out of product in 2020. Risk evaluation of simple pipecleaner products to volume production of complex IC's usually takes 3-4 years. For example Samsung began producing 14nmLPE product in early 2012 - a full three years before it actually shipped in a commercial product. If TSMC say 2020 for initial production, then 2023 is about the time they are planning on a viable yield commercial process.

OK, if you say so. We'll wait and see but I'm skeptical of it as I am of most things.

 

[dividebyzero]

OK, if you say so. We'll wait and see but I'm skeptical of it as I am of most things.

Feel free to necro the thread in 2023 or so if the timetable proves inaccurate
FWIW, Intel aren't that far away from 10nm, and have basically confirmed that the next-gen EUV tooling that they (and Samsung, Glofo, and TSMC) will also be using - the aforementioned ASML NXE:3400B due to debut later this year, will be sufficient for the 5nm process.