IBM, AMD to improve 65nm process for lower power consumption

By Justin Mann on December 6, 2005, 10:52 AM
IBM and AMD, partners in many development aspects, are laying out some groundwork to improve power consumption on their processors, and will be laying out papers particularly relating to reduction in power in their 65nm lines. Using the advantage of “Strained silicon”, the technology they are employing is basically taking existing lines, stretching them to be more efficient, but keeping them at the same clock level or even reducing the clock level while redesigning the chip to be more efficient. This lets the CPU use less power to do the same amount of work. As they say, though, necessity is the mother of invention.

”The combined straining technologies inserted into the AMD-IBM processes reduce power consumption by 40 percent compared to hypothetical chips that don't include the technology. Chips that didn't include these technologies, though, would be difficult to sell because of the power they would consume.”
AMD has worked hard to leverage their CPUs in the market as power-efficient. On the desktop line they have done well, but the Pentium M is a tough cookie to compete with and Intel has a bit of a jump on them. As early as the second half of next year, AMD will be introducing 65nm based CPUs.

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