Looking to further reduce the size and power consumption of RAM, Samsung
is the first memory manufacture to develop a 50nm
process for DRAM. While not currently in production, the 50nm DDR2 technology will result in a memory chip that is less than half the size of like-capacity 60nm parts and even more significant improvements over traditional 80nm manufacturing. With a goal of mass production in 2008, Samsung's design seeks to avoid many problems process reduction brings:
Continued miniaturization of the overall memory circuit and an increasingly limited area of coverage within a wafer cell make it much harder to secure and sustain sufficient volumes of electrons. Adding to the 50nm design improvements, the SEG transistor introduces a multi-layered dielectric layer (ZrO2/Al2O3/ZrO2) to resolve weak electrical features. In addition, the new dielectric layer sustains higher volumes of electron to increase storage capacity, ensuring higher reliability in storing data, the company indicated.
This would be a great boon to laptops, where getting more than 2GB of ram can often be problematic or very expensive. With the increasing demand for larger amounts of RAM in a desktop, it'll make it cheaper to be able to fill those demands as well.