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Micron's enterprise MLC NAND boosts endurance by 600%
Micron has unveiled what it says is the industry's highest endurance multi-level cell (MLC) and single-level cell (SLC) NAND flash memory. Micron is aiming its new 34nm flash technology at large companies that may be interested in doling out for a performance boost in I/O-intensive applications without sacrificing the longevity of hard disk drives.
The company says its 34nm fabrication has brought an improved write performance. The enterprise MLC products can withstand 30,000 write cycles, a six-fold increase over standard MLC NAND technology, and the enterprise SLC parts can achieve 300,000 write cycles, or a three-fold increase. Micron also says its new enterprise NAND supports the ONFI 2.1 synchronous interface, giving them a four to five times higher data transfer rates compared to legacy NAND interfaces.
The company's enterprise NAND offering consists of both a 32Gb MLC NAND and 16Gb SLC NAND chip, which can be configured into multi-die, single packages supporting densities up to 32GB MLC and 16GB SLC. Micron is currently sampling its enterprise NAND products with customers and controller manufacturers, and hopes to enter mass production early next year.
The company says its 34nm fabrication has brought an improved write performance. The enterprise MLC products can withstand 30,000 write cycles, a six-fold increase over standard MLC NAND technology, and the enterprise SLC parts can achieve 300,000 write cycles, or a three-fold increase. Micron also says its new enterprise NAND supports the ONFI 2.1 synchronous interface, giving them a four to five times higher data transfer rates compared to legacy NAND interfaces.
The company's enterprise NAND offering consists of both a 32Gb MLC NAND and 16Gb SLC NAND chip, which can be configured into multi-die, single packages supporting densities up to 32GB MLC and 16GB SLC. Micron is currently sampling its enterprise NAND products with customers and controller manufacturers, and hopes to enter mass production early next year.
User Comments (1)
Post a comment| Guest on October 21, 2009 1:57 PM | Nonsense. In 2003, SLC was good for 1,000,000 cycles, and
when MLS was introduced is was good for 100,000
cycles. Now, after several process generations of rapid decline in endurance and performance, Micron improves the most recent crap from 10,000 cycles to 30,000 cycles, and all of a sudden Flash's problems are solved. Flash gets slower and less reliable as bit density increases, and no amount of Micron/Intel propaganda will change that... http://leitl.org/docs/intel/NVMtrendsNikkei 1201.pdf |
