AMD RDNA 3 GPUs rumored to feature up to seven chiplets

nanoguy

Posts: 1,210   +20
Staff member
In brief: AMD's RDNA 3 GPUs are expected to break cover sometime later this year. Rumors around the new designs have started pouring as of late, and one of them suggests Team Red is returning to chiplet designs with the RX 7000 series.

The last time AMD played with the chiplet design concept in consumer desktop GPUs was back in the Vega era, with the Vega 56/64 and the decidedly prosumer-oriented Radeon VII. Those cards never really took off with gamers, so the company went back to monolithic designs for its Navi (RX 5000 series) and Big Navi (RX 6000 series) GPUs.

However, the rumor mill is abuzz again with hints that AMD may be returning to the chiplet GPU game with RDNA 3 designs. According to reliable leaker Greymon55, Team Red's next-generation GPUs could come in packs of up to seven chiplets.

We already know that AMD is going to tap TSMC for the manufacturing of these new GPUs, but Greymon55 seems to believe the company will go with a mix of process nodes for the various chips involved. For instance, the Navi 31 GPU may be comprised of two 5nm Graphic Complex Dies (GCD), four 6nm Memory Complex Dies (MCD), and an interconnect controller die.

At this point, it's not clear if these are vertically stacked and whether the rumored 512 megabytes of Infinity Cache will reside in those four MCD modules. Either way, going with a chiplet design will no doubt help with yields, which are known to be worse on 5 nm and 4nm process nodes.

Other rumors indicate that the flagship RDNA 3 GPU could sport a whopping 15,360 cores paired with 32 gigabytes of GDDR6 memory. Additionally, the mid-range RX 7700 might end up close to the RX 6900 XT in terms of performance, which would be a remarkable generational improvement.

Meanwhile, Nvidia is readying its Ada Lovelace GPUs, which will be monolithic designs with a wider, 384-bit memory bus and some scary power requirements. According to people who dug through the leaked data from the Lapsus$ hack, Team Green might even take a page from AMD's book and increase the size of the L2 cache on its RTX 40 series GPUs to as much as 96 megabytes — up to 16 times more than Ampere GPUs.

If all goes well, RDNA 3 cards will launch later this year, hopefully in a better climate where the supply chain isn't in a constant struggle to secure essential materials and components and keep factories operational.

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Usukosej

Posts: 183   +82
Can't wait to see this but still not sold on the MCM approach for GPUs. Will it have frametiming issues? Microstutter? Incompatiblity? Etc.

Might work "fine" in DX12 and Vulkan, but what about DX9, 10 and 11?

Raw performance is not the most important metric. That is the reason why Multi GPU died. When high fps don't feel like high fps because of bad framepacing and microstuttering it's pretty pointless to just look at framerate. I remember many multi GPUs having very high fps but really low minimum fps.
 

Puiu

Posts: 5,549   +4,518
TechSpot Elite
Can't wait to see this but still not sold on the MCM approach for GPUs. Will it have frametiming issues? Microstutter? Incompatiblity? Etc.

Might work "fine" in DX12 and Vulkan, but what about DX9, 10 and 11?

Raw performance is not the most important metric. That is the reason why Multi GPU died. When high fps don't feel like high fps because of bad framepacing and microstuttering it's pretty pointless to just look at framerate. I remember many multi GPUs having very high fps but really low minimum fps.
Since everything is on the same SOC it should be fine. It will be treated as a single large GPU and the large cache will help with the latency issues.

At worst, in my opinion, you won't see the chiplets running at full 100% efficiency. For example, 2 chiplets might get 95% of the total FPS you will get if both ran them independently on separate cards.
 
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Usukosej

Posts: 183   +82
Since everything is on the same SOC it should be fine. It will be treated as a single large GPU and the large cache will help with the latency issues.

At worst, in my opinion, you won't see the chiplets running at full 100% efficiency. For example, 2 chiplets will get 95% of the total FPS you will get if both ran them independently on separate cards.
Yeah you are right, it is going to be interresting to see the performance

Won't the "high-end" solutions have a huge die tho?
 

Puiu

Posts: 5,549   +4,518
TechSpot Elite
Yeah you are right, it is going to be interresting to see the performance

Won't the "high-end" solutions have a huge die tho?
Large die area is not really a problem. It might even help with cooling since the heat is not concentrated in a single spot like with monolithic designs. AMD seems be aiming for really high frequencies with RDNA3.

We already know that the new Epyc server CPUs are HUUUUGE.
 
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wiyosaya

Posts: 7,699   +6,641
If I had known GPU power requirements and costs were going to skyrocket, I would have held off buying a new furnace for my home and just bought one of these upcoming nVidia GPUs instead. :rolleyes: 🤣
 
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Irata

Posts: 2,109   +3,642
One of the chiplet approach‘s advantages is lower cost - both as far as yield and number of dies on a wafer are concerned but also process related cost.

This allows AMD to only produce the parts that truly benefit from a newer process like GCD on it, others can be produced on a cheaper more mature node.
 

yRaz

Posts: 4,413   +5,144
One of the chiplet approach‘s advantages is lower cost - both as far as yield and number of dies on a wafer are concerned but also process related cost.

This allows AMD to only produce the parts that truly benefit from a newer process like GCD on it, others can be produced on a cheaper more mature node.
Using older nodes for less critical parts of chiplets is something seem to overlook. As demand drops on say 10nm, they can manufacture the controller while making chiplets on 5, 3 whatever nm. That significantly brings down costs
 

Beerfloat

Posts: 506   +964
It sounds like a great idea in theory. I wonder which new way AMD will invent to once again fail to turn it into a compelling product.
 
Can't wait to see this but still not sold on the MCM approach for GPUs. Will it have frametiming issues? Microstutter? Incompatiblity? Etc.

Might work "fine" in DX12 and Vulkan, but what about DX9, 10 and 11?

Raw performance is not the most important metric. That is the reason why Multi GPU died. When high fps don't feel like high fps because of bad framepacing and microstuttering it's pretty pointless to just look at framerate. I remember many multi GPUs having very high fps but really low minimum fps.

No. This isn't traditional multi-GPU. Only one GCD communicates with host CPU, so it's seen as a single GPU. Will it require a little driver/compiler optimization? Yes. However, hardware will handle all of the syncing between GCDs. Render mode will likely be a form of checkerboarding where each of GCD's shader arrays (6 shader arrays per GCD, 3 shader engines per GCD) iterates on alternating tiles. This also keeps datasets small enough to be maintained in cache. Split-screen render can also be used with stitching, but this can have artifacts around merge point if not done correctly. Also harder to load balance. I'm thinking a dynamically adjustable tiling-type immediate render mode will be in use.

Bandwidth will be extremely high (TB/s), as it needs to be for GPU inter-communication (workload sync).
 
I don't consider Vega a chiplet architecture. Yes, it's 2.5D with HBM2 modules, but GPU is completely monolithic.

RDNA3 will be the first time AMD has done a true chiplet GPU, where multiple GPU dies are bridged via MCDs and dense interconnect. As opposed to simply putting two monolithic GPU dies on a PCB and linking them via PLX chip (PCIe) or on the same package (MI250X), but seen as two independent GPUs.
 

godrilla

Posts: 439   +215
Since everything is on the same SOC it should be fine. It will be treated as a single large GPU and the large cache will help with the latency issues.

At worst, in my opinion, you won't see the chiplets running at full 100% efficiency. For example, 2 chiplets might get 95% of the total FPS you will get if both ran them independently on separate cards.
Each chiplet is rumored to have 6900xt like performance so 190% performance gain with 95% efficiency with 2 chiplets doesn't seem that bad. Also as newer generations of mcm succeed we might see a plateau closer to the 99.9999% efficiency.