AMD Tech Day at Develop 2007

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Rilla927

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Looking forward, Agena will fight Kentsfield and Yorkfield in short order at the tail end of this year to decide who rules the quad-core multi-threaded PC roost. NVIDIA will likely ship their next round of D3D10 acceleration before 2008, too, and AMD have a Radeon or two left up their sleeves before year's end. Microsoft recently shipped the Tech Preview for D3D10.1, too, which some of the aforementioned coming hardware might support. All these factors combine to focus AMD and its Develop Tech Day efforts. Put simply, there's enough going on in graphics and games development that such a Tech Day almost becomes mandatory.

SSE4a support (a subset of 4 instructions from the min SSE4 implementation) in Barcelona has been known for a while, as has the architecture's 128-bit SSE FPU. Boggs mentioned overclocking potential due to the split power plane, while keeping the CPU within its defined TDP. He mentioned the more efficient memory controller (~85% efficiency apparently), the float IPC rate (four 64-bit IEEE754 ops per clock, eight single precision, split 50:50 ADD:MUL) and the fact that AMD have tweaked the memory controller to better feed four processor cores.

http://www.beyond3d.com/content/articles/89
 
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