Athlon 64 and overclocking

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Dantrag

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i read that the athlon 64 doesnt have a fsb anymore...
so if you wanted to overclock it you can only use the multi right?
just wondering how your ment to do it :)
 
uh

It has a front side bus, which runs at the same clock speed as the processor itself.

Remember, the multiplier is a figure that gives cpu clock speed based off the front side bus to begin with... not having a FSB but still using a multiplier is a non sequiter. Anyways... A64/FX have the front side bus speed running at 1/1. A 1600mhz A64 will have a 1600mhz FSB.
 
i believe that the fsb for the a64 is 800mhz dual pumped for effective 1600 mhz. consequently a 1.6 ghz proc should have a 2x multiplier. but the a64s i have seen are 2.00ghz. so the multiplier should be 2.5. teh last time i saw multipliers this low was on pentium 166s
 
but i've read that the the normal fsb is replaced by a direct link between the ram,gpu and cpu...

can someone explain all this plzz :)
i'm getting confused :D
 
as i understand it
the 'FSB' which connects the CPU and Northbridge (both on the chip die) is 200Mhz quad pumped (like the P4 'c' s) - having read some reviews of the FX-51 some users managed to get 100Mhz overclocks - which are just increases in the FSB i assume

Steg
 
the agp bus and pci bus runs at a certain fraction (2/3 and 1/3 i believe) of the speed of the fsb. the processor runs at the speed figured by multipliying the multiplier by the fsb (eg. 2.4c has 200mhz fsb*12x multiplier is 2.4ghz). by upping the fsb, u up the pci, proc and agp speeds. however, agp and pci buses may not be able to take the extra speed and will lead to stability problems. nfoce2 motherboards for athlon xp allows you to lock the agp and pci bus, i dont know about athlon64 boards tho
 
apartently the FSB in A64s is now the 'HyperTransport Bus' but it is basicly the same thing

Steg
 
This is how the HyperTransport link that connects the CPU to the rest of the system works.

HyperTransport communications — HyperTransport is the glue that makes AMD's reorg of the traditional PC work. A packet-based chip-to-chip interconnect, HyperTransport links are pairs of 8-bit or 16-bit unidirectional links running at speeds up to 800MHz. Throw in a little DDR action, sending data twice per clock cycle, and you have an effective clock rate of 1.6GHz per link. As implemented in Hammer, HyperTransport links have a maximum throughput of 6.4GB/s (16 bits upstream plus 16 bits downstream at an effective 1.6GHz).
Hammer systems use HyperTransport for several things. In all Hammer systems, one of the CPUs (or the only CPU) talks to the rest of the system over a HyperTransport link. Traditional chipset services like AGP, PCI, and south bridge I/O are delivered over this link much like VPN tunnels are delivered over TCP/IP connections in a computer network. Done right, HyperTransport should simplify motherboard design by replacing slower and wider connections that require more traces to achieve similar results. In multiprocessor implementations, HyperTransport links between processors allow for inter-chip communications, as well.

The CPU itself uses a "Universal Clock", which is a sort of FSB. It is that clock that used to OC the chip most often. By OCing that Universal Clock, you play with the CPU speed & the memory controller's speed but it does not affect the HyperTransport link. It would seem that Athlon64-FX are not multiplier locked as of yet. But there aren't many BIOSes available allowing to change it.
 
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