First picture of a 0.09 Athlon64

Status
Not open for further replies.
Now the next question is what clock speed will that go upto on the 90nm process? :D

2.6-2.8Ghz A64 sure would be nice.
 
And the next question, how will this affect the temperatures? Smaller die size means smaller area that conducts heat..
 
Originally posted by Mictlantecuhtli
And the next question, how will this affect the temperatures? Smaller die size means smaller area that conducts heat..

I'm sure coolermaster will just bring out a copper heatpipe multifanned heatsink that takes up half a server case and we'll be alright ;)
 
Well the question i wanna know is how much more will it cost?

I already paid a good 500 for my XP3200+ last year and clocked it at 2.6 stable. If they offer a reasonable price for these processors then im willing to speng a grand next year for upgrades.
 
Those are so big thats crazy. In the future, if we have 50MB L2 Cache, does that mean our cpus will actually be bigger? I thought things get smaller over time - in our industry anyways.
 
I wonder when they'll release a Socket-754 Athlon64 running at 2.4GHZ. They allready released it for the Athlon64-FX but that doesn't mean they have good yields with it yet.:(
 
When is the Socket 8XX coming out? Its ment to be a much more highend version of the A64, I recall reading the 7XX was going to be a more budge version.
 
The heatspreader was removed on purpose to show the size of the die. The final chips based on whichever core will have a heatspreader.

& Agissi, I think you mean Socket-939. It should come out around the end of this month.
 
New picture

512K of L2 @ 83mm²
winchester_core.jpg
 
After the picture, a first benchmark on a 0.09 Athlon64 (3500+)

AMD 3500+ S939 2.2G L2=512KB Rev : D0 90nm First TEST

Apparently AMD is using the 0.09 die shrink to add more features rather then just shrink the Die.

At least that's what is reported HERE.

  • Full SSE3 implementation (?)
  • Improved hardware data prefetch mechanism
  • Increased number of writing combine buffers (D0 stepping A64's can now combine up to four non-cacheable streams compared to 2 o_n the C0 and CG stepping A64's)
  • Improved o_n-die memory controller with more advanced open page policy
  • O_n-die thermal throttling
  • Black Diamond Low-K technology (slower less power hungry transistors in less used sections and faster and more power hungry transistors in frequently used sections of the cpu)
  • Furthermore the new D0 A64s can convert LEA intructions into ADD instructions in certain situations wich can then be executed in a single clock cycle wich should also give a performence boost in some apps

This should be interesting.:)
 
Status
Not open for further replies.
Back