do the math youirself, as it depends on numerous specs that are not included in your post.
an example would be the FSB:RAM ration on a run of the mill P4 HT system. the FSB and RAM clocks would be 200MHz:200MHz, both at 64 bits wide. with DDR architecture, those clocks have an actual performance of 800MHz:400Mhz (6.4GBPS:3.2GBPS). as it is, the buses don't have to 'wait' for each other, because thier clocks are in sync. if you change the ratios, it will create latencies and, more often than not, the faster clock rate actually lowers overall system performance.