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But those same APUs (e.g. Ryzen 6000M series) have 8 PCI Express lanes exclusively for GPU connections (20 in total -- 8x GPU, 4x chipset, 4x NVMe, 4x NVMe or SATA). The integrated GPU in those processors uses the Infinity Fabric system to communicate with the rest of the system, so it's not like some of those PCIe lanes are needed for that.When it wastes die area? More cost and less availabilty for almost nothing since APU's it was meant to be paired with supported PCIe 4.0 anyway.
Admittedly, the Navi 24 is very small (107 mm2 in size) so AMD clearly decided to cut the number of lanes used, because of the restriction the perimeter length creates. You can see just how tight it all is in the launch promo images:
That said, the amount of die area the PCIe system takes up is tiny compared to the rest of the components. One set of 4 lanes is less than half the area of a single memory controller (the two green bars on the far bottom left of the above die).