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"Our focus for this process technology generation is to maintain the same increases in performance, power efficiency, and density that we've seen moving from 45nm to 32/28nm with the addition of High k Metal Gate (HKMG)," a company spokesperson said in a statement. "Our 20nm technology will be a full node shrink from 28nm, enabling the ~50% area scaling that the industry has come to expect with each technology generation. The technology has been designed to allow us to maintain our leadership in die size and cost, which remain critical factors for customers at leading-edge nodes."

The electronics giant also listed a few 20nm HKMG features:
Samsung is expecting test-chip shuttles for customers to start shipping in the second half of this year.
A sheet of paper is typically about 1,000 nanometers. It's hard to imaging slicing paper into much more then 2 or 3 sheets. But try to imagine slicing a sheet of paper into 50 even thinner sheets to equal the width of 1 of these transistors. That's a whole lot of little things!
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