Nehalem to use either integrated or external memory controller

Rilla927 · Aug 15, 2007

Available 65nm capacity eats back

By Theo Valich: Wednesday 15 August 2007, 08:01
AFTER OUR CHARLIE Charlie explained Nehalem codenames and details about Nehalem's IMC technology(Integrated Memory Controller) some time ago, things went into silent mode - for a while.

In this article, we'll disclose Intel's strategy with Nehalem. And so far, it looks like fireworks ahead.

Like the Penryn generation of products, split into the world of desktop, notebook and server segments, Nehalem is divided into the Bloomfield, Gilo, Gainestown+Becktown codenames.

As soon as 45 nanometre processors ramp up with Penryn and its riders Wolfdale, Yorkfield/Penryn, Wolfdale-DP, and Harpertown start arriving onto the market in volume, there is going to be excess capacity in Intel's own 65nanometre fabs.

The north bridge strategy will stay active in CSI era as well. Chipzilla will not take AMD's route and simplify chipsets to a point where "chipset" is actually a single chip, but will keep current two chip configuration.

Due to the excess capacity in the 65 nanometre space, Intel will switch chipset production to 65nm and Northbridge/Southbridge concept will stay in force during 2008, especially on the mobile and on desktop side. North bridge chips will sport the CSI interconnect, GPU (if the part is bears IGP) and a DDR3 memory controller.

On the server side, Intel has no choice but to attack AMD on all fronts, from microarchitecture to the current performance-gutter, the legacy dinosaur named GTL+ or 64-bit FSB. Nehalem comes with CSI: Satan Clara (Common System Interface), but it will be connected to 65nm north bridges that will spot additional memory controller. It is quite obvious that FB-DIMM controller will be removed/disabled for the desktop and notebook part, and chipset will be the one that will provide DDR-2/DDR-3 support. This also applies to servers with registered ECC DDR2 memory.

Integrated memory controller will also be a key part of XE (Extreme) line of products, separating Extreme processors from regular ones - this will be accented with successor of Skulltrail "platform" (dual-socket LGA775 system, second generation V8 that will appear this fall with 45nm Yorkfield-XE processors), also known as the "4-series" chipsets. This will finally mean that Extreme series of processors will start to justify the difference in price between regular desktop components and these premium parts, which are currently clocked as much as 3x more expensive than "regular" desktop part – with the only difference being 333 or 667 MHz difference in clock. This was the case with Intel Core 2 Quad Q6600 (2.40 GHz) and Core 2 Extreme QX6800 (2.93 GHz), or duel of last summer - plain-vanilla E6700 (2.66 GHz) was just marginally slower than X6800 (2.93 GHz).

The current Intel strategy also calls for reducing the number of pins on the processor socket, so pay attention to correlations between Nehalem processors and upcoming Socket H (LGA, 715 golden dots on the backside of the processor).

All in all, Intel is showing manufacturing and marchitectural flexibility bar none, and if CSI really kills the bottleneck that GTL+ has become, the Nehalem marchitecture will take x86 performance to new heights. And DDR3 will finally start to make the difference. µ

http://www.theinquirer.net/default.aspx?article=41693

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Nehalem to use either integrated or external memory controller

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