AMD ships TLB erratum-free Opteron samples to customers

By on March 3, 2008, 10:31 AM
AMD was an extreme latecomer to the quad-core server chip market amid repeated production and bug-related delays. Though the company officially launched its quad-core Opterons (previously codenamed Barcelona) in September, it quickly suspended shipments to server vendors and the distribution channel due to the infamous translation lookaside buffer (TLB) erratum.

For those not in the know, the erratum is a chip-level issue involving the TLB logic for the L3 cache that can cause system hangs in specific circumstances. AMD issued a BIOS workaround for this particular bug, though the fix itself knocked anywhere from 5 percent to 20 percent of performance off the chip – not particularly good news for a processor that’s lagging behind its closest Intel counterpart.

Now, however, TLB erratum-free versions of AMD’s quad-core Opteron chip for servers are finally ready to launch. According to reports, samples are currently being sent to all of the company’s major “strategic OEM partners.” Vendors and system builders can expect volume shipments in late March, with quad-core Opteron servers from the likes of Dell, HP, and IBM to start shipping in early Q2.

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