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IBM and 3M have announced that they will co-develop a special adhesive material that will allow silicon to stack in a tower configuration and will be packaged on 3D semiconductors. IBM plans to stack semiconductors as high as 100 chips by 2013.
Big Blue has outlined chip stacking before, but the challenge has always been how to do so efficiently in order to keep temperatures down. As such, the company can currently only stack a few chips rather than the hundreds or thousands they eventually hope manufacture.
“Today's chips, including those containing ‘3D’ transistors, are in fact 2D chips that are still very flat structures,” said Bernard Meyerson, VP of Research, IBM. “Our scientists are aiming to develop materials that will allow us to package tremendous amounts of computing power into a new form factor – a silicon ‘skyscraper.’ We believe we can advance the state-of-art in packaging, and create a new class of semiconductors that offer more speed and capabilities while they keep power usage low -- key requirements for many manufacturers, especially for makers of tablets and smartphones.”
A partnership with 3M is the catalyst that IBM hopes to use to reach that goal. The two are working together to develop an adhesive that would coat the entire silicon between each layer. The “glue” would act as an insulating, conducting and adhesive agent. The result would allow IBM to efficiently stack chips while 3M would have a specialized adhesive that it could market to other companies.
Chips in a stacked configuration would allow for better system-on-a-chip (SoC) compatibility by combining processing, networking and memory subsystems on a single die. IBM claims that these tightly-packaged “bricks” of silicon would create a chip 1,000 times faster than today's fastest microprocessors and enable more powerful smartphones, tablets, computers and gaming devices.
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