Essentially, DRAM performance today is constrained by the capacity of the data channel that sits between the memory and the processor. This channel often becomes a choke point for data, no matter how much faster the DRAM chip itself gets, which was more recently evidenced in the industry's slow transition from DDR2 to DDR3 as desktop and notebook makers weren't really seeing a big enough improvement to warrant the move.
There isn't much in the way of technical details at the moment but it would appear that Micron is leveraging memory architecture knowledge from its Numonix acquisition last year to stack several memory layers atop each other and adding a controller chip right into the memory substrate. This not only allows a higher speed bus that will go from the controller chip to the CPU, it also means that memory could be packed more densely in a given volume.
The company hopes to see the so-called "Hybrid Memory Cube" technology in server and networking markets as early as 2012, with significant volumes in 2013, and could then start to work their way toward the consumer space in 2015.