The company says the new series is expressly designed to remove the burden of ECC from the host processor while minimizing protocol changes. This will make it easier for device makers to use it in a number of consumer applications, including digital audio players, tablet PCs, digital TVs, set-top boxes and more. According to Toshiba, samples will be available starting in mid April and mass production is slated for the second quarter of 2011.
"Toshiba's new SmartNAND will provide our customers a smoother design experience into 24nm generation and beyond. By enabling the system designer to directly manage the NAND using a standard or custom host NAND controller, while leaving the function of error correction within the NAND package, SmartNAND results in faster time to market, access to leading geometries and potentially lowers design costs when compared to conventional NAND flash implementations with external ECC," said Scott Nelson, vice president of Toshiba America's Memory Business Unit.
Toshiba is not the first to embed error correction in their flash memory chips, though. Late last year Micron announced the upcoming release of their own ClearNAND memory modules, which would come with a built-in 24-bit error correction engine and a conventional raw NAND interface.
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