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Intel details future of chip design at Hot Chips 2018

By LemmingOverlrd ยท 8 replies
Aug 21, 2018
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  1. Riding on the coat tails of the successful Kaby Lake-G development, Intel has been pressing home the message that future chip designs will be heterogeneous instead of monolithic, in what it's calling "mix and match innovation."

    The company's plan translates into adopting multiple pieces of silicon known as chiplets, interconnected using EMIB interconnects, combining multiple pieces of silicon from a pre-approved "chiplet library," to create a highly-custom silicon design.

    The chiplet library is, in essence, a repository of pre-designed chip elements (or IP blocks), such as I/O, memory subsystem, communications, CPU and GPU silicon, which have been designed to use a common interface which interconnects them on a single package, yet with performance close to that of a monolithic design, as defined by DARPA in its Common Heterogeneous Integration and IP Reuse Strategies (CHIPS).

    The idea is that you can stick together different pieces of silicon (hence the "Mix 'n' Match"), which needn't even be manufactured at the same fab or share the same process node, and have them communicate under a single common interface.

    Intel, on its side, is taking the opportunity at Hot Chips to oblige and talk up its recent successes, hoping to capitalize on industry momentum.

    Claiming the technical and political high-ground with Kaby Lake G and its Stratix 10 designs, Intel is jumping on the opportunity, having even created a dedicated specification for an Advanced Interface Bus (AIB) and given it away to DARPA, in the hopes it will become the standard interface for CHIPS-compliant designs and aid its foundry business unit (Intel Custom Foundry), which so far has had difficulty in finding customers outside its parent company.

    According to Intel, its process hands-down beats the competition's "2.5D" approach, as it builds the connections without the need for Through-Silicon Vias (TSVs), simplifies design and does not change the package yield, which in Fab economics, is worth a great deal. The competition, such as TSMC's CoWoS and InFO, have alternatives to Intel's process, but they are initially more expensive and add process steps to the assembly of the chips.

    Interestingly, AMD has recently shown its own alternative to on-die communication, and suggested this is all much ado about nothing.

    So what does it all mean? There is an industry-wide movement towards highly-custom, integrated and heterogeneous chip designs which will most likely lead to a faster cadence of chips, higher versatility and lower manufacturing costs, all good things if the savings and features are passed onto the consumer.

    Permalink to story.

     
  2. fktech

    fktech TS Maniac Posts: 522   +136

    Lower chip prices, don't hold your breathe.
     
    seeprime likes this.
  3. tipstir

    tipstir TS Ambassador Posts: 2,842   +193

    CPU/APU
    GPU
    BUS
    PCI-E
    HDD/SD
    RAM/ROM
    SND
    etc.

    Time for a new PC it's time for Smart AI-PC self thinking computer to know when the system needs cleaning internally. Freeing up RAM, diverting RAM to GPU if needed. Making sure Virus are kept out. More of hardware AI than just software. Keeping Pipeline flowing at 90 to 100%. Turn on cooling fans when needed power down to reduce energy needs.
     
    Boilerhog146 and Reehahs like this.
  4. yeeeeman

    yeeeeman TS Addict Posts: 160   +121

    Lower to manufacture, more money for them
     
    seeprime likes this.
  5. yeeeeman

    yeeeeman TS Addict Posts: 160   +121

    AMD has this already on their EPYC CPUs, no? Multiple chip connected on the same substrate.
     
    wiyosaya and seeprime like this.
  6. stewi0001

    stewi0001 TS Evangelist Posts: 2,161   +1,581

    And tell the user to go to bed already! ;P
     
    Reehahs likes this.
  7. wiyosaya

    wiyosaya TS Evangelist Posts: 3,819   +2,173

    I am sure sIntel will say they invented it. ;)
    Hmm...sounds strangely familiar almost as if we have it already. ;)
     
  8. tipstir

    tipstir TS Ambassador Posts: 2,842   +193

    But remember Intel and AMD had worked and shared data to that's why everything is like this today. VIA, CYRIX, NEC, RCA, TI, Motorola, IDT, etc. AI to clean the system without use doing it either auto or manual.
     
  9. Dimitrios

    Dimitrios TS Guru Posts: 430   +308

    I sense Jim Keller had a part of this?
     

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