At the annual Hot Chips conference in Cupertino this week, Microsoft has shed some light on one of the lingering mysteries surrounding its HoloLens augmented reality visor. I’m of course referring to the HoloLens Processing Unit (HPU), largely considered to be the brains of the entire operation.
According to The Register, the HPU is a custom-designed coprocessor fabricated by Taiwan Semiconductor Manufacturing Company (TSMC) on a 28-nanometer process with 24 Tensilica DSP cores. Collectively, there are around 65 million logic gates and 8GB of SRAM as well as a 1GB layer of low-power DDR3 RAM on top – all of which is stuffed neatly into a 12mm x 12mm BGA package that draws no more than 10 watts.
Microsoft has also thrown in PCIe and standard serial interfaces for good measure.
The HPU is said to handle all of the environmental sensing duties as well as other input and output tasks integral to HoloLens’ operation. Microsoft also created 10 custom instructions for the DSPs to speed up specific operations that must be handled in real time. This approach, Microsoft says, allows algorithms to be accelerated up to 200 times faster compared to a pure software implementation.
All things considered, Microsoft Devices Group engineer Nick Baker says it’s capable of performing a trillion calculations per second.
The HPU is in addition to the 14nm Intel Atom Cherry Trail SoC which has its own 1GB of RAM and runs Windows 10. Data that finds its way to the Intel chip has already been “prepped” by the HPU meaning it has to do very little heavy lifting.
Needless to say, Microsoft’s HoloLens is an incredibly powerful piece of kit, even in its pre-production iteration.
Hot Chips images courtesy The Register