Bottom line: Broadcom's bet on three-dimensional chip design has reached a significant milestone. Harish Bharadwaj, the company's vice president of product marketing, told Reuters they expect to ship at least one million stacked chips by 2027 – a projection that could translate into billions of dollars in additional revenue.
The technology is based on a vertically integrated design that bonds two chips into a single stack. By tightly coupling these silicon layers, Broadcom's engineers aim to increase data transfer speeds while reducing energy consumption – a critical advantage as AI workloads become more computationally intensive.
Bharadwaj said the stacked architecture gives data centers "more horsepower with less power," a combination increasingly sought by customers building large-scale AI systems.
The technology has been in development for roughly five years, and Broadcom's first major partner, Fujitsu, is already producing engineering samples. Fujitsu plans to deploy the chips in data center systems, using TSMC's 2-nanometer process for one layer and a 5-nanometer process for the other. The layers are fused during fabrication. Customers can select different process nodes depending on performance or cost targets, giving Broadcom's approach flexibility across multiple use cases.
Although Broadcom does not typically design entire AI processors independently, it has become a key collaborator on custom chip projects. The company provides physical design expertise to transform early blueprints from partners such as Google – known for its in-house Tensor Processing Units – and OpenAI, which is developing its own AI processors, into layouts ready for fabrication.
These custom projects have fueled Broadcom's rapid rise in the AI semiconductor market. The company reported that AI chip revenue doubled year over year to $8.2 billion in its first fiscal quarter.
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The stacked chip initiative is part of that broader strategy. Broadcom's new designs are not limited to Fujitsu; several additional models are in development, with two products scheduled to ship in the second half of this year and three more expected to begin sampling in 2027.
Over the longer term, engineers are experimenting with configurations involving as many as eight stacked chip pairs, an indication of how aggressively the company plans to scale its 3D architecture.
This effort places Broadcom in direct competition with AI chip leaders such as Nvidia and AMD. Both companies dominate the market for high-performance accelerators, but Broadcom's emphasis on vertical integration could offer customers greater bandwidth efficiency and design flexibility.
Bharadwaj said adoption of the technology is accelerating across Broadcom's client base, describing it as an inflection point for the company's silicon engineering strategy.