Not content with being first to market with an USB 3.0 host controller, NEC announced today it has developed a new chipset whose bus speeds could more than triple that of today's interface standards such as USB 3.0 and PCI Express 2.0. The technology uses simple binary transmission schemes and can hit rates of up to 16 gigabits per second.

According to a press release issued earlier today, to accomplish this feat the company improved upon the conventional adaptive equalization technology used by today's chips to correct the data distortion that occurs at high transfer rates. The process currently involves splitting the signal into two and feeding one back onto the original input signal waveform. However, as data rates grow higher, the quicker the chip has to perform the feedback operation to successfully reduce the distortion.

NEC said it gets around this problem by adding a delay to the feedback signal that becomes linked to the data rate, thus reducing the nearest-neighbor inter-bit interference in the signal waveform and successfully alleviating the issue of feedback-time constraint inherent in conventional equalizers.

The company sees the technology as a cornerstone in support of ultra high speed communication interfaces. They would still have to seek approval from different organizations to make this technology part of a standard, but at the very least it proves there's room for the likes of USB 3.0 and others to deliver even higher data transfer speeds. The fastest interface so far due for production later this year is Intel's Light Peak, which could provide transfer rates as high as 10 gigabits per second.