Intel revealed at the annual SC conference that its second generation Xeon Phi co-processor, codenamed Knights Landing, is nearly ready for general availability.

The chipmaker said it has already seeded several pre-production systems to clients through its early ship program. Cray, for example, has a system up and running to handle multiple customer applications in preparation for supercomputer deployments at Los Alamos and NERSC.

As Intel revealed last year, Knights Landing packs a number of innovative features that afford unmatched performance. Systems will be capable of delivering single-precision performance of more than eight teraflops with double-precision performance rated at more than three teraflops. The latter is nearly three times as fast as its predecessor, Knights Corner, although as PC World points out, double-precision is especially important for supercomputing due to higher accuracy rates in floating-point calculations.

The second generation Xeon Phi co-processor also packs 16GB of stacked memory that’s said to offer five times more bandwidth than DDR4. It’s also five times more power efficient and three times denser than the GDDR5 memory found on today’s graphics cards.

The platform will rely on a new interconnect called Omni-Path that improves scalability, reliability and performance. At this stage, however, Intel hasn’t released a ton of information regarding the proprietary interconnect.

More than 50 providers are expected to have Xeon Phi product family-based systems ready for the general availability launch, currently slated for Q1 2016.