In collaboration with Micron Technology, Intel has announced it is ready to start shipping the first 4bits/cell 3D NAND dies. The increase in density allows for 1 terabit of memory per die and is currently the most capacity-dense flash memory ever produced.
New QLC provides a 33 percent higher density compared to TLC (3bits/cell). Intel and Micron's QLC offering utilizes 64 layers of second generation 3D NAND.
Going forward, Intel and Micron are aiming to increase the number of layers to 96 in their third generation NAND memory, but will stick with more common TLC technology for the first attempts at further vertical stacking. Both the 64-layer QLC and 96-layer TLC technologies are using CMOS under the array to keep die sizes small and keep performance in check.
New dies are being built with four planes instead of the more common two plane construction. This allows for a greater number of cells to be read or written to in parallel, resulting in higher bandwidth and greater overall throughput of the system as a whole.
"Commercialization of 1Tb 4bits/cell is a big milestone in NVM history and is made possible by numerous innovations in technology and design that further extend the capability of our Floating Gate 3D NAND technology,” said RV Giridhar, Intel vice president.
Even though cloud computing applications and data centers stand to reap the greatest benefits from this new technology first, consumers are also going to benefit. Cost savings from the increase in density will ultimately lead to higher capacity drives at slightly lower pricing, although it is going to take time for products taking advantage of the new capabilities make it to market.