Through a collaborative effort between the University of Colorado and MIT, a new fabrication method has been realized to build transistors atom by atom. Using the microfabrication technique, researchers have been able to construct 3-D transistors measuring a mere 2.5nm across.
A modified form of thermal atomic level etching is being used to create the almost incomprehensibly small devices. Not all that different from existing commercial applications, researchers believe that higher yields with even greater precision are possible at a mass production scale.
Throughout the experiments conducted, indium gallium arsenide was used as opposed to silicon. The material was subjected to hydrogen fluoride and then washed with DMAC to form a layer of individually arranged atoms. Repeating several hundred times allows a transistor to be built up layer by layer.
Cross section of a sub-3nm transistor
When etching away material, only 0.02nm of material was removed on each pass. "In each cycle, we can etch away just 2 percent of a nanometer of a material. That gives us super high accuracy and careful control of the process," says MIT graduate student Wenjie Lu.
During commercial manufacturing processes, atomic layer deposition (ALD) is already being used. Integration of the newer thermal atomic layer etching process can be done during the same phase as ALD, requiring only a "small redesign of the deposition tool to handle new gases to do deposition immediately after etching."
As an added benefit, materials are not exposed to ambient conditions as often, leaving less time and surface area for oxidation to occur. The end result is higher quality transistors with greater immunity to imperfections.
On average, the researchers' transistors were under 5nm wide and stood around 220nm tall. A 60 percent improvement in transconductance, the measure of energy it takes to convert voltage into current used for computation, was achieved compared to existing FinFET technologies.