The real possibility of TB4 integration is huge for me. Finally no more platform advantage for Intel.
A curious thing about USB4 on Rembrandt is use of PCIe 4.0 to wire port on a certified laptop that chooses to add PCIe data to USB4 port, as shown of their presentaiton slide. TB4 uses PCIe 3.0 x4, whereas AMD will use here 4.0 x2 lanes, I suppose, to bring 32 Gbps of speed.
It's going to be messy marketing with USB4 implementation by different vendors. The spec is loose and not as tight as TB4. Brace yourselves for BS in places!
It is not clear what "DisplayPort 2.0 ready" really means. I am always sceptical about the word "ready". Remember "HD ready" a decade ago? What a joke that was... There is a bit of unknown about DP. On USB4, DP 2.0 signal at 40 Gbps can be tunnelled.
In terms of CPU, does it nativelly support, on die, UHBR10 lanes for DP 2.0 and FRL lanes for HDMI 2.1? Or does CPU rely on seperate level shifter chips to translate DP 1.4 into HDMI 2.1 or into UHBR10? Parade technologies launched a chip for that purpose, to help CPUs - PS196
Many questions, indeed. "DP 2.0 ready" suggests to me that CPU does not have on die UHBR10 lanes, but AMD leaves this to vendors to decide whether they want to install a level shifter chips that would also do DSC pass-through for the first time.