What we know so far: Huawei Technologies is betting it can sidestep one of the semiconductor industry's most entrenched dependencies: the need for cutting-edge lithography machines. The company says it has developed a way to build advanced chips without access to the specialized equipment that has long defined the global pecking order in chipmaking.
The approach, still in development, aims to produce processors that reach transistor densities comparable to a 1.4-nanometer process by 2031. That level of density is widely viewed as the next milestone for leading chipmakers such as Intel, TSMC, and Samsung Electronics, all of which rely on extreme ultraviolet lithography systems made by ASML.
Huawei, which has been blocked from accessing that equipment under US export controls, is instead focusing on redesigning how chips are built internally. "Our solution is feasible and affordable," He Tingbo, president of Huawei's chip arm, said Monday at an event in Shanghai.
Huawei is trying to work around traditional fabrication limits and focusing on architectural changes. Its method centers on stacking multiple layers of circuitry on a single chip and improving the way data moves between them. The goal is to improve performance through efficiency gains rather than further shrinking components.
This strategy reflects a wider shift in semiconductor design. As the industry approaches the physical limits of transistor scaling, companies are increasingly exploring three-dimensional designs and advanced packaging to keep performance gains on track.
Huawei has branded part of its approach as "LogicFolding," a design framework that will appear in its next-generation Kirin smartphone chips, expected later this year.
The company says the architecture is designed to improve performance by reorganizing how processing elements are structured and how they communicate. Similar techniques are also being applied to chips intended for artificial intelligence, where speed often depends as much on data flow as on raw processing power.
Since being placed on a trade blacklist in 2019 and facing tighter US restrictions on advanced semiconductor technology since 2022, Huawei has been forced to develop internal alternatives.
The company said it has spent six years refining its semiconductor capabilities under these conditions and has already mass-produced 381 chip models using related techniques. However, it has not released independent data comparing the performance of its newest designs with those from established global competitors.
Industry observers see Huawei's progress as notable, though far from proven at scale. "Whether Huawei will gain a distinct advantage here remains to be seen, but it's at least an alternative path forward, a breakthrough Huawei managed to find while facing supply chain challenges," Lian Jye Su, a Singapore-based analyst at research firm Omdia, told the Wall Street Journal.
Stacking circuits introduces heat management challenges, as densely layered components can trap heat and affect reliability. It also increases design complexity, requiring more advanced software to coordinate operations across multiple layers of logic.
People familiar with the company's development efforts said Huawei only began achieving more stable results with the technology within the past year. Demonstrating that it can work reliably at scale – particularly in data center environments – will likely require further testing and collaboration with hardware and infrastructure partners.
If Huawei meets its timeline, the implications could be significant. A viable alternative to traditional chip manufacturing methods could lower production costs and weaken the industry's reliance on a narrow set of equipment providers. More broadly, it highlights how geopolitical pressure is accelerating experimentation in chip design, potentially reshaping how the next generation of semiconductors is built.
Huawei says it can build 1.4nm chips without ASML's most advanced machines
