Why it matters: A team of researchers spanning Taiwan and the United States have combined materials science, device engineering, and process compatibility to address one of the most stubborn challenges in magnetic memory development. With the β-phase tungsten puzzle solved, the research presents a credible path toward mass-produced SOT-MRAM – a technology that until now had remained just beyond reach.
The team has solved a materials stability problem that has kept spin-orbit torque magnetic random-access memory (SOT-MRAM) from moving beyond the lab and into commercial production. The breakthrough centers on stabilizing the β-phase of tungsten (β-W), a highly conductive material essential for generating the spin currents required in SOT-MRAM devices, even when exposed to the high temperatures of semiconductor manufacturing.
At the heart of the advance is a tungsten layer that, in its β-phase form, delivers the strong spin-orbit torque effect needed for ultrafast data switching. This phase is notoriously unstable during heat-intensive semiconductor processes. By inserting ultra-thin layers of cobalt, the team was able to maintain β-W's structural integrity under so-called back-end-of-line (BEOL) thermal conditions. Testing showed the material held stable for 10 hours at 400 °C and for 30 minutes at 700 °C – temperatures well above those encountered in fabrication lines.
Those stability gains cleared the way for a manufacturing-compatible 64-kilobit SOT-MRAM chip, complete with CMOS control circuitry. In operation, the device records switching speeds near one nanosecond – fast enough to rival static RAM – while retaining stored data for more than a decade. Its tunneling magnetoresistance measured at 146 percent, an indicator of strong signal contrast between magnetic states. Meanwhile, power consumption remained low.
The performance gap compared with existing memory is striking. Static RAM offers similar speed but loses data when powered off. DRAM adds latency – DDR5, for instance, has around 14 nanoseconds – and NAND flash slows further, with read latencies measured in tens of microseconds. SOT-MRAM combines SRAM-like speed with true non-volatility, a pairing that memory architects have pursued for decades.
Prior to this work, SOT-MRAM arrays delivered latencies closer to 10 nanoseconds. The current result marks a tenfold improvement, while preserving endurance and data retention. Those gains bring the technology closer to deployment in segments where speed and operating efficiency directly influence performance: artificial intelligence training and inference, mobile devices that benefit from extended battery life and secure local storage, and automotive or data center environments where resilience under heat is essential.
Because the design is compatible with existing semiconductor manufacturing flows, TSMC engineers have already positioned it for potential integration into large-scale commercial products. In high-end AI data centers, faster non-volatile memory could reduce both latency bottlenecks and energy costs.
The work was led by National Yang Ming Chiao Tung University Assistant Professor Yen-Lin Huang and supported by Taiwan's National Science and Technology Council and included expertise from TSMC, the Industrial Technology Research Institute, the National Synchrotron Radiation Research Center, Stanford University, and National Chung Hsing University. The findings were published in Nature Electronics.