One of the new features included with Intel's Haswell CPUs was Transactional Synchronization Extensions, or TSX. This set of instructions can improve the performance of multi-threaded applications when a developer uses its corresponding library, and was touted as one of the main improvements in their latest CPUs.

Due to their relatively recent introduction, only a few software developers were testing out TSX-enabled applications. One such developer discovered a critical bug (or "errata" as Intel calls it) in the CPU's implementation of TSX that could cause software failures, which Intel subsequently acknowledged.

In response to the discovery of the bug, Intel has decided to disable TSX on all Haswell processors through a microcode update, which are delivered through motherboard firmware updates. The update should improve the stability of Haswell systems, at the expense of TSX functionality.

It's unusual for Intel to simply disable a feature rather than implement a workaround, suggesting the TSX issues are hardware-related and can't be addressed on any software level.

As the errata was discovered recently, it also affects Intel's upcoming server-oriented Haswell-EP products, as well as Haswell-E for enthusiast consumers, and the first line of Broadwell chips, Broadwell-Y (Core M). All will ship with TSX disabled, although developers testing TSX code on Haswell-EP machines will be able to enable TSX through an option in the firmware.

Intel is giving developers and option to enable TSX on their Xeon products so TSX-enabled software can be ready by the time higher-end Haswell-EX CPUs are released. Haswell-EX parts, along with all future Intel processors and the rest of their Broadwell line, will have the errata corrected by the time they're ready for production.

As TSX is geared towards server applications rather than consumer applications, there's not much to worry about for now. However this will undoubtedly slow the development of TSX-enabled software, which isn't ideal for Intel or those looking for more performance out of their CPUs.