Apple M5 Max MacBooks are getting surprisingly close to real gaming PCs

[trparky]

These chips are built for throughput, efficiency, and pro workloads, not chasing peak gaming performance at 300W+.

And my counter-argument is that maybe PC gaming GPUs need to start thinking about efficiency as well. The fact that they can pull 400 to 500 Watts is beyond insane.

 

[m4a4]

The “2nm vs 5nm” point also doesn’t really prove what you think it does. Process node helps efficiency and density, but architecture and power budget matter way more. A desktop GPU pulling 300–400W with massive cooling and dedicated VRAM is playing a completely different game than a mobile SoC trying to stay under ~30 to 60W.

And you just made my point, in different words. Efficiency (by using smaller node size) also means they can push more performance for less than with bigger nodes. But I repeat myself, again.

...Why did you reply, again?

 

[Loadedaxe]

And you just made my point, in different words. Efficiency (by using smaller node size) also means they can push more performance for less than with bigger nodes. But I repeat myself, again.

...Why did you reply, again?

why did you reply again, you need to do some research.

You’re oversimplifying node size to the point of being wrong.

Yes, smaller nodes can improve efficiency and density. That does not automatically translate into “more performance” in any meaningful, real world sense, especially not compared to completely different classes of hardware.

Performance isn’t dictated by node size alone. It’s a combination of, and I will spell it out for you since your stuck on one aspect.

Architecture (Apple GPU vs Nvidia/AMD GPU are fundamentally different designs)
Power budget (30–60W vs 300–400W is not even the same universe)
Thermal limits
Memory bandwidth and dedicated VRAM vs unified memory
A smaller node lets Apple fit more transistors within a constrained power envelope. That’s why their chips are insanely efficient, not why they suddenly compete with high end desktop GPUs.

You’re basically arguing “2nm > 5nm = faster,” which ignores everything that actually determines performance.

If node size alone decided performance, a phone chip would beat a desktop GPU or CPU. It doesn’t, for obvious reasons.

look at the whole forrest there Gump!

 

[m4a4]

You’re oversimplifying node size

Boy, it's almost like I made a general factual statement about it, and all I've gotten is childish "umm, actually"'s when what I said wasn't wrong.

I mean, I would hope that them buying the most state-of-the-art node for their chips to use on their high-end macbooks would perform well...

Oh look! The general statement that ruffled some feathers, all because their silicon doesn't impress me as much as you think it should.

Especially considering architecture doesn't change the fact that node size matters too. Especially when the majority of their competition isn't on that small of a node size.
And then after 5 generations of Apple silicon, do you truly believe that they aren't squeezing all of the performance out of it that they can?
Or are you seriously telling me that their architecture is so advanced that they can pull the same performance on a bigger node? What ridiculous assumptions you'd have to make to think node size isn't an advantage at this stage.

The irony here is that you think I missed the forest for the trees I'm done with your pedantic replies.

Edit: Thanks! What a gift never having you reply to me again if you're going to be that way

 

[Loadedaxe]

Boy, it's almost like I made a general factual statement about it, and all I've gotten is childish "umm, actually"'s when what I said wasn't wrong.

Oh look! The general statement that ruffled some feathers, all because their silicon doesn't impress me as much as you think it should.

Especially considering architecture doesn't change the fact that node size matters too. Especially when the majority of their competition isn't on that small of a node size.
And then after 5 generations of Apple silicon, do you truly believe that they aren't squeezing all of the performance out of it that they can?
Or are you seriously telling me that their architecture is so advanced that they can pull the same performance on a bigger node? What ridiculous assumptions you'd have to make to think node size isn't an advantage at this stage.

The irony here is that you think I missed the forest for the trees I'm done with your pedantic replies.

I stick by my words of wisdom, never argue with stupidity, ...I am done as well, I could go into more depth of why your not getting it, but it would probably give you an even more migraine.

See what I did there ....

I will leave this with you....genius

m4a4 said:
I mean, I would hope that them buying the most state-of-the-art node for their chips to use on their high-end macbooks would perform well...



I have never ignored anyone on TS, grats for being the first.

 

[trparky]

Actually, LoadedAxe is mostly correct.

Shrinking the node size can improve performance, but not on its own and not in any meaningful way when you’re comparing completely different classes of hardware.

What a smaller node really provides is:
* better efficiency (performance per watt)
* higher transistor density

What it doesn’t do is magically determine real-world performance.

You can have an inefficient architecture on a cutting-edge node and end up with mediocre results, just like a well-designed architecture on an older node can still perform very well.

You can see this in how Intel and AMD have competed over the years. Even when Intel was on a less advanced node, architectural decisions often mattered just as much, if not more, than the process itself. Likewise, AMD’s gains weren’t just from smaller nodes, but from major architectural improvements with Zen.

Performance ultimately comes down to how those transistors are used—architecture, power budget, thermals, and memory all play a much bigger role than node size alone.

That’s the key point being missed here: node size is an enabler, not a driver of performance.

What sets Apple apart from desktop CPUs and GPUs isn’t that they’ve broken the rules of performance—it’s that they’re optimizing for a completely different goal. Apple is chasing performance per watt, not absolute performance.

Their chips operate in the 30–60W range, while desktop CPUs and GPUs can pull 150–400W or more. That alone puts them in entirely different classes of hardware.

On top of that, Apple controls the full stack (hardware, software, compilers, and operating system) so everything is tightly optimized for their silicon in a way companies like Intel, AMD, and nVidia simply can’t match in a general-purpose ecosystem.

They also use a unified SoC design with shared memory which improves efficiency and reduces overhead by eliminating the need to copy data between system RAM and VRAM. The CPU and GPU operate on the same memory pool and address space, lowering latency and simplifying data access.

However, this approach doesn’t scale the same way as discrete desktop GPUs with dedicated VRAM which offers significantly higher capacity for demanding workloads like modern gaming.

So it’s not that Apple is outperforming desktop hardware, it’s that they’re achieving unusually high performance within strict power and thermal limits.

 

[Loadedaxe]

Actually, LoadedAxe is mostly correct.

Shrinking the node size can improve performance, but not on its own and not in any meaningful way when you’re comparing completely different classes of hardware.

What a smaller node really provides is:
* better efficiency (performance per watt)
* higher transistor density

What it doesn’t do is magically determine real-world performance.

You can have an inefficient architecture on a cutting-edge node and end up with mediocre results, just like a well-designed architecture on an older node can still perform very well.

You can see this in how Intel and AMD have competed over the years. Even when Intel was on a less advanced node, architectural decisions often mattered just as much, if not more, than the process itself. Likewise, AMD’s gains weren’t just from smaller nodes, but from major architectural improvements with Zen.

Performance ultimately comes down to how those transistors are used—architecture, power budget, thermals, and memory all play a much bigger role than node size alone.

That’s the key point being missed here: node size is an enabler, not a driver of performance.

What sets Apple apart from desktop CPUs and GPUs isn’t that they’ve broken the rules of performance—it’s that they’re optimizing for a completely different goal. Apple is chasing performance per watt, not absolute performance.

Their chips operate in the 30–60W range, while desktop CPUs and GPUs can pull 150–400W or more. That alone puts them in entirely different classes of hardware.

On top of that, Apple controls the full stack (hardware, software, compilers, and operating system) so everything is tightly optimized for their silicon in a way companies like Intel, AMD, and nVidia simply can’t match in a general-purpose ecosystem.

They also use a unified SoC design with shared memory which improves efficiency and reduces overhead by eliminating the need to copy data between system RAM and VRAM. The CPU and GPU operate on the same memory pool and address space, lowering latency and simplifying data access.

However, this approach doesn’t scale the same way as discrete desktop GPUs with dedicated VRAM which offers significantly higher capacity for demanding workloads like modern gaming.

So it’s not that Apple is outperforming desktop hardware, it’s that they’re achieving unusually high performance within strict power and thermal limits.

Good point on the Intel vs AMD comparison...that’s actually a perfect example of how architecture can matter just as much, if not more, than node size.

I think part of the disconnect here is that it came across like I was trying to argue or say he was wrong. That wasn’t the intent at all, I was trying to build on what he said and add context, not turn it into a back and forth. These threads tend to spiral because people reduce things to quick one line “gotchas,” get defensive, and nuance gets lost.

There’s no denying node advantages. Smaller nodes absolutely help with efficiency and density. The issue is treating node size like it overrides everything else, when it clearly doesn’t.

Real world performance comes down to how those transistors are used, architecture, power budget, thermals, and memory design. That’s why comparing Apple silicon directly to desktop GPUs based on node alone doesn’t really hold up. Apple is optimizing for performance per watt in a much lower power envelope, not chasing the same kind of peak performance.

I’m not claiming to be an expert, but I did spend a lot of time digging into this when the M1 first came out because it genuinely surprised me how good it was. That’s where most of this perspective is coming from and I have been delving into it more over the last few years.

Maybe I could have said it better, thanks for the input.

 

[AlphaLyrae]

If you port the same architecture to a smaller, denser, more efficient node, you do gain performance. There's no denying that. 1st gen Vega 10 on GloFo 14nm vs 2nd gen Vega 20 on TSMC 7nm (N7) showed massive leaps in performance, bordering on a generational uplift (because Vega was always power-limited). It's not often you get to see an identical uArch on different nodes, but AMD was just switching to TSMC's design kits and needed an architecture to verify functionality and design.

So, yes, Apple better have good performance out of the latest lithography nodes. And obviously, you have to design a decent architecture to take advantage of the increased density, but the baseline power efficiency comes with the node itself. That can be improved with power and clock gating, voltage islands, etc etc. Within a set die-area target, greater density typically results in greater computational power, so long as the transistors are in a compute block. If Apple wanted to improve its media engines and dedicate 10% die-area budget to that, the compute blocks (CPU/GPU) need to improve performance beyond that 10% die-area that cannot be allocated. With a more efficient node, you can dynamically increase power to fit performance targets, then dramatically power and clock gate to maintain efficiency. This also applies to switching between various CPU core types where highest performing cores are shut off once a heavy compute workload finishes.

Not sure why there were so many strawman arguments about this.

Also keep in mind that M5 Max is beyond the current Low-NA reticle limit of about 830-840mm2. So, this is not a tiny package. This thing is huge and merges two complete dies together.

 

[m4a4]

Not sure why there were so many strawman arguments about this.

I don't know. It's like they realized the specific thing that I said (or at least was trying to say) was true, but couldn't admit it after their first reply.

I am otherwise looking forward to seeing more PC chip makers move to smaller nodes and making those performance strides...