Micron is developing GDDR6, likely as a stopgap to HBM shortages

Shawn Knight

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Update (Dec 15) | Correction: Micron reached out to inform us that the memory advancements they are working on for 2016 will be called GDDR5X, not GDDR6. GDDR5X is intended to provide performance improvements over standard GDDR5 without the need of dramatically reworking current architectures. Furthermore, Micron tells us that GDDR5X is not their answer to HBM, hinting they have plans for HBM products of their own pending announcement.

Micron is reportedly preparing to bring GDDR6 memory to market next year as the company's answer to high-bandwidth memory (HBM). Kristopher Kido, Director of Micron’s global Graphics Memory Business, recently confirmed the news with Fudzilla.

The report claims GDDR6 will be up to twice as fast as mainstream GDDR5, offering speeds of between 10 to 14Gb/s. Today's 4GB GDDR5 chips perform at 7Gb/s while 8GB chips will top out at rates of 8Gb/s. It's not all about speed, however, as the publication notes that GDDR6 will utilize a form factor that's similar to GDDR5, thus reducing the burden and complexity of design and manufacturing.

As Digital Trends correctly highlights, HBM already offers more than double the performance of GDDR5 in comparable sizes. Furthermore, GDDR6 likely won't be as efficient as HBM nor will it offer the same level of latency. Plus, HMB 2.0 with even higher performance and greater efficiency is coming sometime in 2016.

So, what advantages does GDDR6 hold? Right now, shortages have made HBM hard to come by. Assuming GDDR6 will be plentifully available and if GDDR6 is as similar to its predecessor as we're to believe, it could serve as a viable solution for next generation mid-range graphics cards. This would allow manufacturers to reserve scarce HBM / HBM 2.0 for high-end applications.

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"This would allow manufacturers to reserve scarce HBM / HBM 2.0 for high-end applications."

What a ****ing lie. They don't need GDDR6 to be allowed the opportunity to "reserve scarce HBM / HBM 2.0". All other memory architects that are currently available will allow them this reservation. Hell they have been doing so for decades, why would it be any different now that HBM is out?
 
"This would allow manufacturers to reserve scarce HBM / HBM 2.0 for high-end applications."

What a ****ing lie. They don't need GDDR6 to be allowed the opportunity to "reserve scarce HBM / HBM 2.0". All other memory architects that are currently available will allow them this reservation. Hell they have been doing so for decades, why would it be any different now that HBM is out?
Maybe to artificially make it seem like a more scarce market, in order to drive the price of HBM modules up? That's the only thing I could think of.

I personally find it hard to believe that many think GDDR6 will be suddenly readily available. I mean it won't take as long to mature the process as with a brand new memory architecture, but it's still different than its predecessor so there will have to be some trial and error, and adjustments made. Or I'm entirely naïve.
 
"This would allow manufacturers to reserve scarce HBM / HBM 2.0 for high-end applications."

What a ****ing lie. They don't need GDDR6 to be allowed the opportunity to "reserve scarce HBM / HBM 2.0". All other memory architects that are currently available will allow them this reservation. Hell they have been doing so for decades, why would it be any different now that HBM is out?
I think you'll find that GDDR6 is just some renaming of GDDR5X, since no JEDEC specification exists for GDDR6 (unlike GDDR5X).
GDDR5X was developed as a cost effective upgrade for second tier and lower GPUs where bandwidth might be an issue (primarily for GPGPU and high res gaming). The memory IC's would very likely be only incrementally more expensive than current GDDR5, but because of the doubled density, a card would need half the chips, physical connections (traces), and half the GPU memory controllers (assuming a like-for-like bandwidth comparison with conventional GDDR5), while requiring very little in the way of memory controller and memory controller PHY revision.

HBM2.0 will be an expensive proposition simply because of the amount of TSVs/microbumping and the test, verification, and validation involved. The platforms for this (X-ray metrology) have only just begun to begin series production. There's a reason that 2.5D and 3D IC production has been termed " Stack and Pray"
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It might be chic to blame IHV's for incremental advances in specification, but in this instance cost and yield of HBM, and GDDR5's relative lack of bandwidth and high power budget do necessitate a change in thinking. Why devote eight IMC's worth of diespace for 512-bits of bus width when halving them to 256 reduces space, power requirement, and PCB complexity but maintains (or increases) bandwidth?
 
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