Forward-looking: Micron has outlined its memory and storage roadmap for the next few years, revealing significant upgrades across its next-generation products. The plans span DDR6, LPDDR6, HBM, and NAND, as the AI infrastructure spending boom continues to push hardware costs higher.
Micron has detailed its 1δ (1-Delta) node as the follow-up to 1γ (1-Gamma). The new node, which features angstrom-level process control and HKMG CMOS structure, will reportedly deliver roughly 25% higher bit density than its predecessor when manufacturing advanced DRAM products.
Micron added that 1-Delta will support next-generation memory standards such as DDR6 and LPDDR6, with the former offering more than twice the bandwidth of DDR5. The company, however, is positioning DDR6 as high-reliability server memory for AI data centers rather than a direct successor to DDR5 for client PCs.
Micron expects 1-Delta to enter volume production in H2 2027, but there's no official launch date for DDR6 yet.
Micron earlier demonstrated a 512GB DDR5 RDIMM running at 9,200MT/s in September 2026. The company now says its next-generation technology will deliver 1TB RDIMMs for high-density AI workloads, and claims it will be the industry's highest-capacity RDIMM when it enters production.
As for LPDDR6, Micron claims it will deliver 35% better power efficiency than LPDDR5, with even bigger gains at some densities. Scott DeBoer, the company's president and chief technology and products officer, said Micron is working with a range of partners, including Meta, to deploy LPDDR6 memory in AI data centers.
Micron also revealed that its future memory products will use 6F² (6-Feature-Square) DRAM rather than 4F², citing cost, complexity, and capacitor pitch limits that significantly reduce the latter's scalability.
The company added that its next-generation DRAM products will use wafer bonding and High-NA EUV before possibly moving on to newer materials.
In addition to 6F², Micron is reportedly developing 3D DRAM as a longer-term alternative, while introducing "vHBM," a vertically stacked design that places memory directly on top of the compute die. Micron claims the novel design will improve efficiency by increasing bandwidth per watt in its next-generation HBM chips.
On the storage front, Micron outlined production plans for its G11 NAND flash with more than 400 layers. Compared to G9, the new product targets twice the bit density, 1.5 times the I/O speed, and more than 25% lower energy per data transfer. It will also reportedly enter production in H2 2027, though Micron has yet to announce an official launch date.
Micron's 2027 roadmap: DDR6 with 2x DDR5 bandwidth, 1TB RDIMMs, and 400+ layer NAND
