TSMC is now ahead of schedule for mass production of 7nm chips

[Greg S]

Forward-looking: In an era where delays of die shrinks have become the norm, TSMC has done the exact opposite and rescheduled mass production of its first 7nm process for an earlier date.

As demand is ever increasing for smaller fabrication processes, Taiwan Semiconductor Manufacturing Company (TSMC) is aggressively moving its schedule forward. This is an extremely rare event as foundries have struggled to overcome the challenges of producing minuscule transistors.

Some of TSMC's main clients that are generating enough demand to cause a change of schedule include Qualcomm, Xilinx, Nvidia, MediaTek and HiSilicon. Out of those clients, several are interested in skipping the 10nm process completely. Jumping right down to 7nm could save on development costs of products that could quickly and easily be outperformed by competitors using the smaller process technology.

Nvidia has already confirmed that TSMC will be a partner for 7nm chip production. Even though the GTX 1180 is rumored to use 12nm FinFETs, we will have to wait until August to receive more information about upcoming graphics cards.

TSMC's first 7nm process called N7 is now slated for mass production within the second quarter of 2018. That means N7 is essentially ready for mass production now, but could still have some minor tweaks made before the end of the month.

Already looking forward, TSMC will switch to the successor of its N7 process, N7 Plus. The improved 7nm process is based on EUV lithography and is intended to be ready for 2019.

Despite the 10nm process having a relatively short life cycle, that has not stopped AI developers, FPGA designers, and Apple from placing orders. Engineers working on mobile SoC chips have benefited from the now less expensive 12nm technology available to build higher performing, affordable smartphone chips.

Permalink to story.

https://www.techspot.com/news/75006-tsmc-now-ahead-schedule-mass-production-7nm-chips.html

 

[Vulcanproject]

Presumably 12nm production has been happening for Nvidia for a while now to enable a new generation Geforce launch this summer. Then 7nm production later in the year for a refresh perhaps.

AMD still look like they are nowhere for consumer graphics hardware. At computex they didn't mention any changes to the idea there won't be any major consumer GPU launches from them until next year.

 

[Evernessince]

Presumably 12nm production has been happening for Nvidia for a while now to enable a new generation Geforce launch this summer. Then 7nm production later in the year for a refresh perhaps.

AMD still look like they are nowhere for consumer graphics hardware. At computex they didn't mention any changes to the idea there won't be any major consumer GPU launches from them until next year.

I think AMD's GPU strategy is a good one. If they come out with Navi next year and it is an MCM using infinity fabric they will instantly take the lead. They might as well hold all their card until then and avoid any half measures.


I wonder if this 7nm speed up will also push Zen 2 sooner.

 

[Puiu]

Presumably 12nm production has been happening for Nvidia for a while now to enable a new generation Geforce launch this summer. Then 7nm production later in the year for a refresh perhaps.

AMD still look like they are nowhere for consumer graphics hardware. At computex they didn't mention any changes to the idea there won't be any major consumer GPU launches from them until next year.

We'll get 7nm Vega in late 2018 or early 2019 and Navi in 2019.

 

[Fluffmeister]

I wonder if this is why we haven't seen anything new from Nvidia, maybe they have changed their plans too and shifted their focus from 12nm to 7nm.

Makes sense in many ways, Volta powers the worlds most powerful supercomputer and the GTX 1080 Ti is still waiting for the competition to turn up.

 

[Vulcanproject]

I think AMD's GPU strategy is a good one. If they come out with Navi next year and it is an MCM using infinity fabric they will instantly take the lead.

Unlikely, traditional MCMs mean latency problems. Nvidia have their own multi GPU solutions under the radar, from what I heard they have worked with TSMC directly for a while now on through silicon vias. TSV. It's also a lot more viable with Nvidia's recent designs not least because thermals are critical for stacking.

We'll get 7nm Vega in late 2018 or early 2019 and Navi in 2019.

7nm Vega already exists. But not for consumer. Unless you hear about a consumer 7nm Vega shrink soon then it could be another year from now before AMD actually deliver a new GPU part in that segment. If they do somehow appear it probably won't be for at least another 6 months.

 

[Evernessince]

Unlikely, traditional MCMs mean latency problems. Nvidia have their own multi GPU solutions under the radar, from what I heard they have worked with TSMC directly for a while now on through silicon vias. TSV. It's also a lot more viable with Nvidia's recent designs not least because thermals are critical for stacking.



7nm Vega already exists. But not for consumer. Unless you hear about a consumer 7nm Vega shrink soon then it could be another year from now before AMD actually deliver a new GPU part in that segment. If they do somehow appear it probably won't be for at least another 6 months.

And yet AMD is the only company on the market with a successful MCM design. It doesn't matter what you think Nvidia might do, AMD has it working on their CPUs right now.

"I heard they have worked with TSMC directly for a while now on through silicon vias"

Why you think rumor is greater than actual product is beyond me.

 

[Vulcanproject]

And yet AMD is the only company on the market with a successful MCM design.

Why you think rumor is greater than actual product is beyond me.

Eh? Never heard of NV link? Why do you think MCM GPUs are unknown to Nvidia or AMD are breaking new ground with them by using an MCM design with Ryzen? Where is their 'actual product' besides some CPUs? They can't even build a good high end graphics core at the moment, that's the hardest part!

TSVs is a considerably better higher potential solution especially for GPUs. Faster communication when a typical GPU requires massive bandwidth, faaaar more than a CPU if you are to communicate between two dies efficiently. They are also even more latency sensitive if anything. Ryzen still suffers from these issues just the same.

In short anyone can slap multiple dies on an MCM. Nvidia have been looking at it for years. But whoever brings TSV technology to market at a viable price point with useful yields on a consumer GPU will likely be the ones ahead.

You would have to say it's Nvidia with the resources to push anything like that first.

 

[Evernessince]

Eh? Never heard of NV link? Why do you think MCM GPUs are unknown to Nvidia or AMD are breaking new ground with them by using an MCM design with Ryzen? Where is their 'actual product' besides some CPUs? They can't even build a good high end graphics core at the moment, that's the hardest part!

TSVs is a considerably better higher potential solution especially for GPUs. Faster communication when a typical GPU requires massive bandwidth, faaaar more than a CPU if you are to communicate between two dies efficiently. They are also even more latency sensitive if anything. Ryzen still suffers from these issues just the same.

In short anyone can slap multiple dies on an MCM. Nvidia have been looking at it for years. But whoever brings TSV technology to market at a viable price point with useful yields on a consumer GPU will likely be the ones ahead.

You would have to say it's Nvidia with the resources to push anything like that first.

You do realize that NV Link isn't a GPU die - die interconnect right? You are completely off topic. NVLink is a proprietary slot on the motherboard for a very few select and expensive systems that helps lower GPU to CPU latency among other things. Absolutely nothing to do with MCMs.

"when a typical GPU requires massive bandwidth, faaaar more than a CPU if you are to communicate between two dies efficiently"

So what's the exact value of inter-die communication? Typically when people state generalities instead of an exact number is because they are assuming. Let's see your source.

"In short anyone can slap multiple dies on an MCM"

Yes, so much so that Intel has dumped billions into R&D and still hasn't come up with a winning MCM design. What you say and reality could not be further apart.

"You would have to say it's Nvidia with the resources to push anything like that first."

Do you realize how many tech titans have fallen, despite "having the resources"? This isn't an objective point backing your opinion, it's a subjective nuance that's been proven wrong time and time again.

 

[captaincranky]

...[ ]....Yes, so much so that Intel has dumped billions into R&D and still hasn't come up with a winning MCM design. What you say and reality could not be further apart.....[ ]....

When a company gets as big as Intel, it's almost certain they will have an unwieldy and unsustainable number of sand baggers, drones, incompetents, and Peter principle hangers on in their work force. The result is complacency, and a lack of innovation,which is simply due to falling into a thoughtless, repetitive routine.

Success leads to excess in compensation, and smugness on the part of the executive operatives.

At the fab level, the "sooner I solve the problems of 10 nm fabrication, the less job security I have". Which is not to say even the most educated employees could be facing the possibly of becoming obsolete, and subject to being replaced by rapidly evolving AI and robot solutions.

AMD did this to Intel once before with their dual core chips, versus the ever scorned Prescott P-4, and it would seem they're about to do it again.

But, as Japanese Admiral Yamamoto of Pearl Harbor fame was reputed to have said, "I fear we have awakened a sleeping giant", predicting the US' eventual destruction of the Japanese empire.

OTOH, Sears and Roebuck was, once upon a time, the Amazon.com of today. Their yearly 2 inch thick catalog, contained a plethora of "stuff", which a young city dweller such as myself would never known existed, were it not for that annual mailing.

Now, Sears and their subsidiary K-Mart, are clinging on to solvency by the skin of their teeth, and it would appear their demise is all but inevitable.

It;s time to rein in the Intel troops, with a stern wake up call on the order of, "if you people can't come up with a 10 nm or smaller process, I'll find new people to either build it, or fail as your replacements.

So yes, Intel is and has, likely spent billions on R & D, at great of which, has likely been misspent...

I have built all Intel systems out of perhaps habit and reputation, but when I saw Gigabyte's new X470 "Aorus" gaming board, I rapidly began to confuse want with need, and started shopping those, and the new Ryzen line. Oh well, I suppose, "this too, shall pass"...
\
For me, thinking about being forced to buy and install a copy of Windows 10, has the same impact as thinking about baseball during sex.

 

[Vulcanproject]

You do realize that NV Link isn't a GPU die - die interconnect right? You are completely off topic. NVLink is a proprietary slot on the motherboard for a very few select and expensive systems that helps lower GPU to CPU latency among other things. Absolutely nothing to do with MCMs.

"when a typical GPU requires massive bandwidth, faaaar more than a CPU if you are to communicate between two dies efficiently"

So what's the exact value of inter-die communication? Typically when people state generalities instead of an exact number is because they are assuming. Let's see your source.

"In short anyone can slap multiple dies on an MCM"

Yes, so much so that Intel has dumped billions into R&D and still hasn't come up with a winning MCM design. What you say and reality could not be further apart.

"You would have to say it's Nvidia with the resources to push anything like that first."

Do you realize how many tech titans have fallen, despite "having the resources"? This isn't an objective point backing your opinion, it's a subjective nuance that's been proven wrong time and time again.

You were talking as if Nvidia had little to no experience working with multi GPU communication when they are basically the world leader, albeit off die with a technology such as NV Link. You're also assuming AMD have some sort of lead in this field by equating their efforts on their CPU parts being easily transferable to their GPU parts, which isn't the case any more so than Nvidia's own depth of experience with scaling and linking their GPUs together successfully. This was the point that apparently went over your head.

Let's see your source. Let's see all this interposed GPU hardware AMD has been churning out to give them the lead? Rubbish! That's what your claims were originally.

Anyone can dump multiple dies on an MCM, it's whether it is actually any good and practical for that given application. I direct you once again to your supposition AMD's work on infinity fabric actually crosses over easily to their GPU division. It's a very different proposition. The evidence is they aren't anywhere close to producing ONE good high end graphics core, let alone nailing together several of them to work well in a windows environment!

Resources were but one factor, not THE deciding factor which your reply seized upon. If anyone has the existing viable graphics core designs, the experience linking multiple GPU dies, understanding of the interconnection requirements, strong ties with the fab that has worked heavily on TSV technology and finally the resources to put it all together it's Nvidia.

Not AMD and their tinpot graphics arm as per your amusing suggestion here. Anything else?

 

[Evernessince]

You were talking as if Nvidia had little to no experience working with multi GPU communication when they are basically the world leader, albeit off die with a technology such as NV Link. You're also assuming AMD have some sort of lead in this field by equating their efforts on their CPU parts being easily transferable to their GPU parts, which isn't the case any more so than Nvidia's own depth of experience with scaling and linking their GPUs together successfully. This was the point that apparently went over your head.

Let's see your source. Let's see all this interposed GPU hardware AMD has been churning out to give them the lead? Rubbish! That's what your claims were originally.

Anyone can dump multiple dies on an MCM, it's whether it is actually any good and practical for that given application. I direct you once again to your supposition AMD's work on infinity fabric actually crosses over easily to their GPU division. It's a very different proposition. The evidence is they aren't anywhere close to producing ONE good high end graphics core, let alone nailing together several of them to work well in a windows environment!

Resources were but one factor, not THE deciding factor which your reply seized upon. If anyone has the existing viable graphics core designs, the experience linking multiple GPU dies, understanding of the interconnection requirements, strong ties with the fab that has worked heavily on TSV technology and finally the resources to put it all together it's Nvidia.

Not AMD and their tinpot graphics arm as per your amusing suggestion here. Anything else?

Once again, off topic. SLI /= Inter-die connect. You aren't even remotely close.

"Let's see your source. Let's see all this interposed GPU hardware AMD has been churning out to give them the lead? Rubbish! That's what your claims were originally."

This is the part where you create a scarecrow argument because you can't cite a source for your GPU's communicate much more inter-die than CPUs comment, predictable behavior.


"Anyone can dump multiple dies on an MCM, it's whether it is actually any good and practical for that given application."

Anyone? Yeah you only have to design your entire architecture around it. Once again, you are completely wrong. It takes years to develop an architecture, which has to be targeting an MCM design from the start. It's why Intel and Nvidia just can't revise their chips to work with MCM.


"The evidence is they aren't anywhere close to producing ONE good high end graphics core, let alone nailing together several of them to work well in a windows environment!"

What evidence? You can't even cite your ambiguous non-numbers, let alone back up this charade of a statement. Please show me the evidence.

FYI MCMs don't use use multiple high end chips, that would be counter to the benefits in the first place. One advantage of an MCM is using multiple smaller chips. If you didn't know that MCMs use smaller chips you haven't even payed attention to the surface details of AMD's ryzen launch, let alone know the technical details of MCM design.


"Resources were but one factor, not THE deciding factor which your reply seized upon"

You were the one who said


"You would have to say it's Nvidia with the resources to push anything like that first."

Now you are just trying to add things after the fact to take back your blemish.


"If anyone has the existing viable graphics core designs, the experience linking multiple GPU dies, understanding of the interconnection requirements, strong ties with the fab that has worked heavily on TSV technology and finally the resources to put it all together it's Nvidia."

Well first, none of what you listed means jacks squat to MCM design except interconnection requirements, which is just another one of your vague "pearls of wisdom". The fact is Nvidia doesn't understand the requirements of connecting two dies together, otherwise they would have a product. Therefore they have zero MCM experience and any answer to the contrary is factually incorrect.

"the experience linking multiple GPU dies"

No, they don't. NVLink is not a Die-Die technology. It goes through the CPU.

"strong ties with the fab that has worked heavily on TSV technology"

Means nothing

 

[hahahanoobs]

Unlikely, traditional MCMs mean latency problems. Nvidia have their own multi GPU solutions under the radar, from what I heard they have worked with TSMC directly for a while now on through silicon vias. TSV. It's also a lot more viable with Nvidia's recent designs not least because thermals are critical for stacking.



7nm Vega already exists. But not for consumer. Unless you hear about a consumer 7nm Vega shrink soon then it could be another year from now before AMD actually deliver a new GPU part in that segment. If they do somehow appear it probably won't be for at least another 6 months.

And yet AMD is the only company on the market with a successful MCM design. It doesn't matter what you think Nvidia might do, AMD has it working on their CPUs right now.

"I heard they have worked with TSMC directly for a while now on through silicon vias"

Why you think rumor is greater than actual product is beyond me.

Fiji also had HBM first....

 

[hahahanoobs]

You were talking as if Nvidia had little to no experience working with multi GPU communication when they are basically the world leader, albeit off die with a technology such as NV Link. You're also assuming AMD have some sort of lead in this field by equating their efforts on their CPU parts being easily transferable to their GPU parts, which isn't the case any more so than Nvidia's own depth of experience with scaling and linking their GPUs together successfully. This was the point that apparently went over your head.

Let's see your source. Let's see all this interposed GPU hardware AMD has been churning out to give them the lead? Rubbish! That's what your claims were originally.

Anyone can dump multiple dies on an MCM, it's whether it is actually any good and practical for that given application. I direct you once again to your supposition AMD's work on infinity fabric actually crosses over easily to their GPU division. It's a very different proposition. The evidence is they aren't anywhere close to producing ONE good high end graphics core, let alone nailing together several of them to work well in a windows environment!

Resources were but one factor, not THE deciding factor which your reply seized upon. If anyone has the existing viable graphics core designs, the experience linking multiple GPU dies, understanding of the interconnection requirements, strong ties with the fab that has worked heavily on TSV technology and finally the resources to put it all together it's Nvidia.

Not AMD and their tinpot graphics arm as per your amusing suggestion here. Anything else?

Once again, off topic. SLI /= Inter-die connect. You aren't even remotely close.

"Let's see your source. Let's see all this interposed GPU hardware AMD has been churning out to give them the lead? Rubbish! That's what your claims were originally."

This is the part where you create a scarecrow argument because you can't cite a source for your GPU's communicate much more inter-die than CPUs comment, predictable behavior.


"Anyone can dump multiple dies on an MCM, it's whether it is actually any good and practical for that given application."

Anyone? Yeah you only have to design your entire architecture around it. Once again, you are completely wrong. It takes years to develop an architecture, which has to be targeting an MCM design from the start. It's why Intel and Nvidia just can't revise their chips to work with MCM.


"The evidence is they aren't anywhere close to producing ONE good high end graphics core, let alone nailing together several of them to work well in a windows environment!"

What evidence? You can't even cite your ambiguous non-numbers, let alone back up this charade of a statement. Please show me the evidence.

FYI MCMs don't use use multiple high end chips, that would be counter to the benefits in the first place. One advantage of an MCM is using multiple smaller chips. If you didn't know that MCMs use smaller chips you haven't even payed attention to the surface details of AMD's ryzen launch, let alone know the technical details of MCM design.


"Resources were but one factor, not THE deciding factor which your reply seized upon"

You were the one who said


"You would have to say it's Nvidia with the resources to push anything like that first."

Now you are just trying to add things after the fact to take back your blemish.


"If anyone has the existing viable graphics core designs, the experience linking multiple GPU dies, understanding of the interconnection requirements, strong ties with the fab that has worked heavily on TSV technology and finally the resources to put it all together it's Nvidia."

Well first, none of what you listed means jacks squat to MCM design except interconnection requirements, which is just another one of your vague "pearls of wisdom". The fact is Nvidia doesn't understand the requirements of connecting two dies together, otherwise they would have a product. Therefore they have zero MCM experience and any answer to the contrary is factually incorrect.

"the experience linking multiple GPU dies"

No, they don't. NVLink is not a Die-Die technology. It goes through the CPU.

"strong ties with the fab that has worked heavily on TSV technology"

Means nothing

SLi = two or more GPU's working as one.
It is similar to MCM. Stacking. Connecting. Performance.

 

[Evernessince]

Fiji also had HBM first....

Has nothing to do with the conversation or article.

SLi = two or more GPU's working as one.
It is similar to MCM. Stacking. Connecting. Performance.

Incorrect, SLI allows 2 GPUs to communicate. 2 GPUs, not 2 dies.

enough said.

 

[shakattack]

And yet AMD is the only company on the market with a successful MCM design.

Why you think rumor is greater than actual product is beyond me.

Eh? Never heard of NV link? Why do you think MCM GPUs are unknown to Nvidia or AMD are breaking new ground with them by using an MCM design with Ryzen? Where is their 'actual product' besides some CPUs? They can't even build a good high end graphics core at the moment, that's the hardest part!

TSVs is a considerably better higher potential solution especially for GPUs. Faster communication when a typical GPU requires massive bandwidth, faaaar more than a CPU if you are to communicate between two dies efficiently. They are also even more latency sensitive if anything. Ryzen still suffers from these issues just the same.

In short anyone can slap multiple dies on an MCM. Nvidia have been looking at it for years. But whoever brings TSV technology to market at a viable price point with useful yields on a consumer GPU will likely be the ones ahead.

You would have to say it's Nvidia with the resources to push anything like that first.

CPUs are far more latency sensitive tyan GPUs. Implementing Infinity Fabric on GPUs is not so much more difficult but the main reason it hadn't been implemented with AMD is because 14nm Vega is essentially a mobile design and as implemented with GloFlo it doesn't clock so high and pouring resources into making a multi-GPU solution with a not-so-suitable chip doesn't make sense. However with 7nm it's a completely different story. 7nm Vega is designed for infinity fabric. This was mentioned in Computex by David Wong. We will see very soon how Vega 7nm performance/cost scales compared to Nvidia. Nvidia knows that releasing a monolithic chip with double cores would simply be going down the already failed Intel route and thus Nvidia has delayed theor next release imo.

 

[hahahanoobs]

Has nothing to do with the conversation or article.



Incorrect, SLI allows 2 GPUs to communicate. 2 GPUs, not 2 dies.

enough said.

*Looks around*
This is a joke right?

 

[Urgelt]

Presumably 12nm production has been happening for Nvidia for a while now to enable a new generation Geforce launch this summer. Then 7nm production later in the year for a refresh perhaps.

AMD still look like they are nowhere for consumer graphics hardware. At computex they didn't mention any changes to the idea there won't be any major consumer GPU launches from them until next year.

Too optimistic about nVidia. Having the process ready for mass-production, assuming it *is* ready, doesn't mean that specific chips are ready for that scale. There's development time involved. nVidia might ship something at 7 nm next year, but that's not a foregone conclusion, either. There are not only engineering questions to answer, but also questions about cost and yields. nVidia won't jump on the 7 nm bandwagon until the business case is favorable, their engineers are ready to roll out a 7 nm chip, test production runs prove successful and a contract is signed. All of that takes lead time.

Also, 'refresh' usually refers to changes to a chip within a given process; e.g. a 12 nm chip when refreshed is still at 12 nm. If jumping to a new process, it's not considered a 'refresh' but a new product. (You might be able to think of exceptions, but I'm drawing a blank.)

That's only a convention, though, not a rule companies have to follow.

 

[quadibloc]

There is one thing worth noting: this TSMC 7nm process does not involve doing any of the layers with EUV. It's multiple patterning all the way down. That probably explains why they're able to bring it to volume production before the more ambitious 7nm processes being attempted by other foundries.

That, of course, is not to say that TSMC isn't the one doing the right thing - the benefits of 7nm even without EUV may have been worth the effort.