There are many good approaches for testing memory. However, many tests simply throw some patterns at memory without much thought or knowledge of memory architecture or how errors can best be detected. This works fine for hard memory failures but does little to find intermittent errors. BIOS based memory tests are useless for finding intermittent memory errors.
RAM chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test attempts to test for this condition. Therefore, an ideal strategy for testing memory would be the following:
- Write a cell with a zero.
- Write all of the adjacent cells with a one, one or more times.
- Check that the first cell still has a zero.
It should be obvious that this strategy requires an exact knowledge of how the memory cells are laid out on the chip. In addition there are a never ending number of possible chip layouts for different chip types and manufacturers making this strategy impractical. However, there are testing algorithms that can approximate this ideal and MemTest86 does just this.
- Support UEFI-based ARM systems (arm64/aarch64), including memory test algorithms ported to ARM64 and optimized using hand-written assembly code. Special thanks to Simula eX³ project (ex3.simula.no) for providing high-end ARM64 systems for testing.
- Added BADRAM & badmemorylist formatted strings and instructions in the exported HTML report to mask defective memory addresses (Pro only)
- Revamped RAM SPD screen in the Main Menu with graphical view of all RAM slots
- Added preliminary support for DIMM temperature reporting (when supported by DIMM)
- Added option to change save location of logs/reports to another disk volume (file system)
- Added prompt on various exit options (shutdown, reboot, exit to BIOS) on application exit.
- Added keyboard shortcut (F12) to save screenshot to file within the Main Menu
- Support for saving test results to a byte-packed, binary file for storage-limited systems
- Support for passing configuration parameters via command line arguments
- Added new config file parameter, 'EXACTSPDSIZE', to specify the total capacity of all detected SPD to match before allowing tests to begin
- Added new config file parameter, 'MEMREMMB', for specifying the minimum amount of memory to leave unallocated during testing
- Added new config file parameter, 'MINMEMRANGEMB', for specifying the minimum size of memory ranges that shall be allocated for testing
- Added new config file parameter, 'AUTOREPORTFMT', for specifying report format of auto-saved reports
- Added new config file parameter, 'PMPDISABLE', to disable TFTP uploading of XML messages for Management Console integration
- Added new config file parameter, 'RTCSYNC', to sync real-time clock with PXE server (via a periodically updated 'CurrentTime.txt' served by the PXE server)
- Added new config file parameter, 'VERBOSITY', for specifying the verbosity level of the debug output
- Added new config file parameter, 'TPL', to specify the UEFI task priority level of the MemTest86 application
- Support for per-baseboard configuration file via baseboard-prefixed filename (eg. "Surface Pro-mt86.cfg")
- Optimized/removed stale 32-bit code in memory tests
- Improved test coverage by alternating between ascending/descending assignment order of CPU cores between passes when running in parallel mode
- Track CPU core/thread ID of detected memory errors, and include the list of CPUs in error in test summary/report
- Added tracking and reporting of min/max/average CPU + DIMM temperatures (when supported by DIMM)
- Added SMBIOS memory device info to reports
- Modified DRAM address ECC error reporting from (Column,Row,Rank,Bank) -> (Channel,Slot,Rank,Bank,Row,Column)
- Added serial number of DIMM module experiencing ECC errors in report (supported chipsets only)
- Added channel/slot information of detected SPDs in report (supported chipsets only)
- Fixed 100% CPU usage when waiting for input in main menu
- Improved UI drawing performance for better responsiveness
- Generate beeps of Piezo Speaker on test end (if available)
- Changed to large, coloured PASS/FAIL message box on test end
- Changed to large, coloured FAIL message box on failed pre-test SPD checks
- Fixed Test 12 errors in HTML report being truncated
- Updated blacklist to work around new UEFI bugs Apple added to their UEFI firmware
- Updated blacklist to work around Microsoft/Huawei laptops with display issues related to screen resolution
- Fixed crash on VirtualBox due to reading of non-existent MSRs
- Include system information details in TestResult XML messages to PXE Server (Site Edition)
- Display error when there is a TFTP transfer error when sending Status XML messages to PXE server (Site Edition)
- Fixed escaping of chars to XML entities when generating messages to PXE Server (Site Edition)
- Output additional lines to console during MemTest86 boot
- Fixed detection of uncorrected ECC errors for AMD Ryzen chipsets
- Fixed ECC detection for > 2 channels for AMD Ryzen chipsets
- Fixed ECC support for multiple CPU dies for AMD Ryzen chipsets
- Fixed ECC error detection on AMD Ryzen chipsets with multiple CPUs
- Added preliminary support for AMD Ryzen ECC reporting via error count registers when PFEH is enabled
- Fixed ECC detection for Intel chipsets that use error count registers
- Added ECC support for different Intel Coffee Lake chipset variants
- Added disabling of SMI for Intel Kaby Lake chipsets to allow ECC errors to be detected
- Added ECC support for Intel Comet Lake chipsets
- Added preliminary support for decoding of system address to socket/channel/rank/bank/row/column address on Broadwell-DE. This information is logged in the log file.
- Fixed incorrect reporting of ECC capabilities for chipsets with multiple IMCs
- Added support for retrieving CPU info for Intel Gemini Lake chipsets
- Added preliminary support for retrieving CPU info for Intel Ice Lake chipsets
- Fixed potential unstable behaviour when increasing the target multiplier for Intel Silvermont chipsets
- Fixed enabling turbo mode on Intel Silvermont chipsets
- Updated temperature offsets for AMD Ryzen chipsets
- Added preliminary support for reading AMD Ryzen 5000 (Family 19h) chipset temperatures
- Updated EDK2 library to edk2-stable202008
- Fixed memory leak when exiting program
- Revised Portuguese translations
- Updated unifont.bin file with higher weight Russian glyphs
- Removed PassMark contact information from reports
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