There are many good approaches for testing memory. However, many tests simply throw some patterns at memory without much thought or knowledge of memory architecture or how errors can best be detected. This works fine for hard memory failures but does little to find intermittent errors. BIOS based memory tests are useless for finding intermittent memory errors.
RAM chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test attempts to test for this condition. Therefore, an ideal strategy for testing memory would be the following:
- Write a cell with a zero.
- Write all of the adjacent cells with a one, one or more times.
- Check that the first cell still has a zero.
It should be obvious that this strategy requires an exact knowledge of how the memory cells are laid out on the chip. In addition there are a never ending number of possible chip layouts for different chip types and manufacturers making this strategy impractical. However, there are testing algorithms that can approximate this ideal and MemTest86 does just this.
- Added REPORTPREFIX configuration file parameter to specify the prefix text to use for the report files
- Added TEST12_SINGLECPU flag to blacklist.cfg to force test 12 to run in single CPU mode as a workaround for CPU threads hanging in PARALLEL mode
- Added DISABLE_LANG flag to blacklist.cfg to disable language support and font support, which is known to cause issues on some Dell systems
- Changed the blacklist.cfg RESTRICT_ADDR flag lower address limit from 0x1000 to 0x100000, as some systems experience issues when writing to the BIOS area (up to 0xFFFFF)
- Fixed bug with blacklist.cfg RESTRICT_ADDR flag not setting the lower address limit properly
- Fixed buffer overrun bugs detected by HeapGuard when measuring memory latency
- Fixed fluctuations in memory/cache speed measurements
- Fixed UI issues with System Information screen
- Changed "red" error text to "light red" for better readability
- Fixed CPU temperature readings for several AMD Ryzen chipsets
- Added reporting of Module Manufacturer's Specific Data in DDR4 SPD modules to PXE server for use with Management Console (Site Edition only)
- Fixed timing issues with retrieving SPD data on Skylake-X chipset
- Fixed decoding of DDR4 SPD Post Package Repair (PPR) (Byte 9)
- Fixed decoding of DDR4 SPD Secondary SDRAM Package Type (Byte 10)
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