AMD documents confirm Zen 6 desktop and APU chips will support AM5 socket

Daniel Sims

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The big picture: AMD's upcoming Zen 6 CPUs have long been expected to support the company's current AM5 socket, likely closing the book on the platform before AMD moves on to AM6. Data mining has now provided the clearest evidence yet that this will be the case for the Medusa and Olympic Ridge product families.

Prominent leaker InstLatX64 recently shared screenshots of documents from AMD's website that list the company's upcoming Zen 6 processors under the AM5 platform. The information suggests that users with Zen 4 or Zen 5 CPUs will be able to upgrade to Zen 6 without purchasing a new motherboard.

AMD previously said it would support AM5 through 2027, so the news comes as no surprise. However, the company has not formally announced Zen 6, much less confirmed which socket platform it will use. Prominent tipsters have suggested multiple times over the past couple of years that AM5 would continue through Zen 6, but the latest leak is the strongest evidence to come directly from AMD.

The site lists three Zen 6 CPU lineups, two of which support AM5. These include the desktop-exclusive chips, codenamed Olympic Ridge, and some Medusa APUs designed for AM5 and AMD's mobile FP10 socket. Meanwhile, other Medusa processors will be FP10-only.

AMD is expected to introduce Zen 6 sometime in late 2026 or early 2027. Olympic Ridge chips, presumably named Ryzen 10000, could feature up to 24 cores, more than any previous Ryzen processors, use TSMC's 2nm process, and exceed 6.5GHz. Medusa APUs are expected to appear in laptops and other low-power devices in 2027, with some reportedly using a 3nm process.

Leaked code also indicates that Zen 6 will introduce a third AMD core type. Like Intel's low-power E-cores, Team Red's new tier-3 cores will primarily handle background and idle tasks, while Zen 6 and Zen 6C cores manage heavier workloads.

Instead of being an entirely new design, the ultra-low-power cores reuse components from five previous generations of AMD processors: Zen 6's instruction set, Zen 5's microarchitecture, Zen 4's floating-point unit, Zen 3's L2 cache, and Zen 2's L3 cache. The first clue to the existence of these cores emerged in leaked design documents for Sony's rumored upcoming PlayStation handheld, which is expected to use them alongside Zen 6C cores.

AMD patents suggest that the company will introduce the AM6 socket with Zen 7. The new platform might support PCIe 6.0 and DDR6 memory while retaining compatibility with Zen 5 coolers.

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I'm looking forward to this release. Hopefully, benchmarks will show some decent gains over Zen5 at lower TDPs. IMO, Zen5 was disappointing in that respect.
 
I do hope for a lower TDP and some decent IPC gains with AM6 versus what we got with the last go around. Having a socket and ecosystem that lasts more than one generation is what drew me to the Ryzen ecosystem so I hope that it lasts for this rollout as well. I can only imagine what changing to a more advanced RAM standard would cost in the next 2 to 4 years.
 
The biggest update will be core per die - rumored to be 12 cores per die, which means a 12 core 10800X3D
What's also nice is that the standard chips will also be getting 48 MiB of L3 cache per die, that by itself will mean the lower end ones get a nice gaming boost over standard Zen 5 chips.
 
Seems like they needed to stick with it as asking people to upgrade to DDR6 on AM6 right now would probably not go well for them.

Yeah I don't think they rushing for ddr6 considering they just re-released the 5800X3D for 350$ and most people stuck with ddr4 are just upgrading to that for now.
 
Even if they planned to have Zen 7 change sockets, I can’t see them doing that now with RAM prices out of control (and even worse for a new type).
We'll see. Right now everyone is busy destroying the consumer market by building massive AI datacenters. At some point they need consumers to actually use those datacenters - at that point prices will normalize..but we are still at least 2 years from an eventual "crash"
 
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