What we know so far: AMD is taking a different approach with its upcoming Zen 6 processors, introducing a new type of low-power core built from pieces of several earlier Zen designs rather than a single architecture. The change surfaced in a recent Linux kernel patch, which shows how the system identifies and manages these cores. The patch makes clear that the low-power cores are distinct enough to warrant their own classification, rather than being grouped with AMD's existing compact "C" cores.
Patch notes that the system needs a way to properly identify these low-power cores in user space, since they currently show up as "unknown" in the CPU topology.
It also specifies that on supported AMD and Hygon chips, these cores should scale performance using amd_get_highest_perf() instead of the fixed CPPC_HIGHEST_PERF_PERFORMANCE limit, aligning them with how existing efficiency cores are managed.
What stands out is how these cores are built. Analysis from leaker InstLatX64 points to a hybrid design that combines multiple generations of Zen. The reported setup includes a Zen 6 instruction set, Zen 5 microarchitecture, Zen 4 floating-point unit, Zen 3 L2 cache, and Zen 2 L3 cache.
– InstLatX64 (@InstLatX64) July 29, 2026
Instead of designing a low-power core from scratch, AMD appears to be reusing and combining existing components. That mix-and-match approach suggests the company is trying to improve efficiency while keeping development time and complexity in check.
These low-power cores would sit alongside AMD's current Performance and Efficiency cores, creating a three-tier setup. Performance cores handle high-clock workloads, while Efficiency cores are smaller and tuned for lower power use. The new low-power cores go a step further, targeting very light workloads where minimizing power draw is the priority. In that sense, they're closer in purpose to Intel's low-power efficiency cores, though AMD's design is structured differently.
The potential benefit is clearer in mobile devices. Laptops and gaming handhelds could offload lighter tasks to these low-power cores, reducing overall power consumption. That could help extend battery life and let systems run certain processes at just a few watts. How much of a difference that makes will depend heavily on how well software can manage and assign workloads across the different core types.
There are still gaps in what's known. AMD hasn't shared performance or efficiency data for these cores, and it's not yet clear how well this blended architecture will scale under real workloads. The design is unconventional, and its success will likely hinge on how smoothly the hardware and software layers work together.
This development comes as AMD is rolling out its Zen 6 server chips, with desktop versions expected later this year. But the broader market may complicate things. PC shipments have been trending down, and higher memory prices, driven in part by AI demand, are pushing up system costs.
That matters more in laptops and handhelds, where upgrading the CPU usually means replacing the entire device. Even if AMD delivers better efficiency, adoption could be limited if buyers hold off on new hardware.
Still, the idea of building a core from a mix of proven parts marks a notable change in direction. Rather than stretching one architecture across every use case, AMD is carving out more specialized roles for different core types. If it works, it could give the company more flexibility in how it designs chips for power-sensitive devices.
AMD's new Zen 6 chips will have a low-power core built from five different generations of Zen
