Intel files for patent on "software defined super cores" to maximize single-core performance

[DragonSlayer101]

What just happened? Intel has filed a patent for a new software-based technology designed to boost single-core performance in x86 CPUs without relying solely on hardware scaling. The application describes a novel technique that allows multiple cores in a CPU to pool their resources and function as a larger "super core" to enhance single-threaded performance.

The technology, referred to as Software-defined Super Cores (SDC), would dynamically fuse multiple cores to execute single-threaded workloads while appearing to the operating system as a single physical core. According to Intel, this approach improves single-threaded performance without requiring higher voltage or frequency.

Traditionally, CPUs are designed with large cores and higher frequencies to improve single-core performance. However, this approach increases power consumption, leading to higher CPU temperatures under heavy workloads. The new technology aims to significantly improve single-threaded performance while improving power efficiency and keeping the thermals in check.

Intel claims that SDC avoids the drawbacks of large, inefficient, high-frequency cores by distributing workloads across multiple cores with the help of specialized software and a shared memory space.

The company believes this method will deliver better performance per watt while allowing CPUs to dynamically switch between standard and super core modes depending on workload demands.

One of the key challenges was splitting workloads across multiple cores while maintaining program order. Intel reports that its team solved this through innovative techniques, such as the Shadow Store Buffer, which ensures instructions are executed in the correct order while still presenting the fused cores to the operating system as a single logical core running a single thread.

How Intel plans to integrate SDC into future products remains to be seen. To implement the technique successfully, the company must address challenges such as synchronization complexity to achieve seamless, low-latency inter-core communication – critical for maintaining program order across physical cores.

A leaked Intel document in June revealed that the company is developing Nova Lake-S for desktops and the low-power Nova Lake-U for laptops, followed by the Twin Lake, Wildcat Lake, and Bartlett Lake-S families. It is unclear whether any of these platforms will feature SDC or if more time will be needed before the technology reaches commercial products.

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Intel files for patent on "software defined super cores" to maximize single-core performance

 

[Mowserx]

Is this the Bizarro version of Hyperthreading?

 

[GeoffreyA]

Is this the Bizarro version of Hyperthreading?

Indeed. It's the reverse of HT. Instead of two threads on one core, SDC is one thread across many. So, it virtualises a single core out of two or more.

In addition to those relating to splitting a thread well and correctly, there'll likely be performance regression in multithreading because fewer cores are being exposed than the implementation underneath. No doubt, they'll add a way to distinguish between the virtualised single and actual cores, similarly to how, in the early days of SMT, schedulers were naively placing two threads on one core though others were free, till it got fixed by scheduling multiple threads on different cores first.

 

[wiyosaya]

Intel's latest foray into smoke and mirrors. Intel will stop at no amount of BS marketing trying to make it look like their CPUs are laying the golden egg.

 

[guillejp]

Oh wow so this could finally make it possible to play Crysis at actually decent framerates! Meaning, could be great for single or poorly threaded games. Quite fantastic if it works as it should

 

[HardReset]

AMD has tried same over a decade ago, nothing concrete came out of it. This is much harder than using CPU and GPU simultaneously for calculations without specific software support. Something AMD has also tried for over a decade, without major breakthroughs.

Since this is only patent, it is expected to take multiple years for anything to happen. AMD and Intel also have cross licence agreement so AMD has no problems using this technology if it actually happens to be good.

 

[unoficialoficial]

Is this the Bizarro version of Hyperthreading?

Hyperthreading is like having a single kitchen (core) with two cooks (threads) who can work on different recipes at the same time—ideally each recipe needs different equipment. For example, one I/o heavy related thread might be waiting for data from memory, while the other computational heavy thread on the same core is crunching numbers. When the first thread stalls, the second thread keeps the core busy, so you get the most out of the chip’s space—just like a couple living together uses a house more efficiently than someone alone. Of course, for this to work well, the two threads shouldn’t be demanding too much of the same resources at the same time.

This technique called Software‑Defined Super Cores (thanks to Grok for the explanation) is a bit like a double‑clutch in a car. It runs all the possible branches of an out‑of‑order decision tree in parallel. When the main prediction misses, the other cores inside the “virtual” core have already explored alternative paths to some depth and can hand back results quickly. In more technical terms, a lead core executes the current block while follower cores speculate on the next ones, pulling the required live‑in data through wormhole channels. If speculation fails, a signal flushes the younger instructions and the pipeline restarts from the correct program counter. A telemetry system helps avoid getting stuck in a loop of repeatedly trying to fine‑grain heavily dependent code.

This approach works best when the follower cores don’t share a cache with the lead core. If they do, they keep flushing each other’s cache (since at least one will always miss) and the cache never really “warms up.”

With Itanium, Intel’s philosophy was that nobody knows the program better than its programmers, so the compiler should handle the prediction. But most programmers are lazy and not very comfortable with low‑level optimizations, so that strategy didn’t pan out. Today, Intel says, “If you’re too lazy to keep the CPU on track, we’ll pre‑compute all the alternative paths.” It’s a brute‑force solution. However, the patent prevents other compilers from implementing this technique on Intel’s CPUs which have and small cores (they sell CPUs, not compilers), and it may also restrict developers from embedding the technique directly in their application code. So if they don’t even release a compiler the technique is locked without practical use.

 

[Durch]

Considering how many times they've de-throttled their prior chips due to security/thermal issues this seems like a disaster waiting to happen. On a positive note queue up a new socket requirement.