Intel is reversing course and bringing hyper-threading back to its server chips

[DragonSlayer101]

Forward-looking: In a major reversal from its earlier decision to ditch hyper-threading across its entire product portfolio, Intel has officially confirmed that simultaneous multi-threading will return to its data center processors with the Xeon 8 "Coral Rapids" family, scheduled for release in 2028. However, the company did not confirm whether the technology will also return to its client CPUs.

Speaking to investors and analysts at Intel's Q2 2026 earnings call on Thursday, CEO Lip-Bu Tan said that the company is working on several strategies to regain its CPU market share across the retail and enterprise segments, including bringing back simultaneous multi-threading with Coral Rapids in 2028. He added that Intel is also focusing on improving single-threaded performance to regain competitiveness in key market segments.

Tan confirmed the return of hyper-threading while answering a question from Morgan Stanley analyst Joe Moore, who asked if the company had any concrete plans to regain lost market share from AMD and Arm in the next five years. Tan did not directly address Intel's rivalry with AMD and downplayed the competition with Arm, saying that the British chip design firm is a "great partner" for Intel, and that the two companies have a strong working relationship.

After making processors with hyper-threading for more than two decades, Intel ditched the technology with the launch of Arrow Lake-S in 2024. However, the company had already reduced its use of hyper-threading over the previous processor generations, starting with the Alder Lake family in 2021. Alder Lake, which was Intel's first desktop processor family to feature a hybrid core architecture, incorporated hyper-threading only in its performance cores while the efficiency cores implemented only a single hardware thread each.

On the server side, the company's current-generation Xeon 6 Granite Rapids processors retain hyper-threaded performance cores, offering up to 128 physical cores and 256 threads. However, the Xeon 6+ Clearwater Forest family ditches hyper-threading entirely, featuring up to 288 single-threaded E-cores built on Intel's 18A process node. The upcoming Xeon 7 Diamond Rapids lineup is expected to offer up to 192 performance cores without simultaneous multi-threading.

Hyper-threading, which is Intel's proprietary implementation of simultaneous multi-threading, was originally introduced in the early 2000s in single-core Xeon and Pentium 4 processors, promising improved performance in multi-threaded workloads. But with the steady increase in the number of physical cores in x86 CPUs, Intel ditched hyper-threading in the belief that it was largely a relic of the past and not nearly as important as it was twenty years ago.

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Intel is reversing course and bringing hyper-threading back to its server chips

 

[Puiu]

They really need to achieve the highest clock speeds and IPC they can in order to compete with AMD while using the least amount of power. (in both servers and desktop)

If Zen6 rumours are to believed, Intel will need around 40-50% better gaming performance to get close to AMD (270k being the baseline).

 

[Endymio]

They really need to achieve the highest clock speeds and IPC they can in order to compete with AMD while using the least amount of power. (in both servers and desktop)

The last thing their server chips need are higher clock speeds. Intel's largest server chips are still only 288 cores, and your average server is running 10 to 100 times as many processes. Additional cores are a more efficient way to boost performance in terms of power consumption.

IPC in general terms is helpful-- but the traditional manner of increasing that is a longer pipeline, which means higher energy consumption.

 

[Inthenstus]

The last thing their server chips need are higher clock speeds. Intel's largest server chips are still only 288 cores, and your average server is running 10 to 100 times as many processes. Additional cores are a more efficient way to boost performance in terms of power consumption.

IPC in general terms is helpful-- but the traditional manner of increasing that is a longer pipeline, which means higher energy consumption.

But… he wasn’t talking about servers… I get what you’re saying but that isn’t what they said.

 

[Endymio]

But… he wasn’t talking about servers…

But he literally specified desktops and servers.

 

[PierreJG]

Man, HT is old. I can remember that in the early 2000s I bought my first own gaming pc. Took me almost a year, as I had to buy 1 part per month. They had the 3ghz Northwood and then the Prescott. The difference was that the Northwood had only a 512MB level 2 cache, and the Prescott had a 1MB Level 2 cache. I know there were some with a 2MB level 2 cache, but it was never released here. Back then, the 512MB ran faster in games than the 1MB Prescott. Might have been that 1MB cache memory was a little ahead of its time.

I am still trying to find a good point in the E and P cores. There are benefits, but for an AMD CPU that does the same and is faster in gaming, you pay less here. I do not have a new Intel, but it would be nice to see Intel bring back HT.

 

[Theinsanegamer]

Man, HT is old. I can remember that in the early 2000s I bought my first own gaming pc. Took me almost a year, as I had to buy 1 part per month. They had the 3ghz Northwood and then the Prescott. The difference was that the Northwood had only a 512MB level 2 cache, and the Prescott had a 1MB Level 2 cache. I know there were some with a 2MB level 2 cache, but it was never released here. Back then, the 512MB ran faster in games than the 1MB Prescott. Might have been that 1MB cache memory was a little ahead of its time.

I am still trying to find a good point in the E and P cores. There are benefits, but for an AMD CPU that does the same and is faster in gaming, you pay less here. I do not have a new Intel, but it would be nice to see Intel bring back HT.

The cache is not why it was slower. Prescott had a longer 31 stage pipeline, compared to northwood's 20 stage. The cache was insufficient to overcome the latency at the same clockspeed, and prescott was unable to clock significantly higher then northwood due to power and thermal limitations.

Also, we DID get the 2MB CPUs. Those were Cedar Mill and the extreme edition. You can buy them on ebay right now. Now, nobody BOUGHT them, because core 2 was a thing and absolutely slaughtered the pentium 4 across the board. There was also Gallatin, which had a 2MB L3 cache alongside the 512MB L2. These were fantastic, I had one in my childhood PC, but they were rare and expensive, the L3 cache was neat but situational. For Sins of a solar empire and Supreme commander, it was a significant bump.

The E cores are great for productivity. AMD loses there, no ifs and or buts about it. In gaming, only the x3d are faster, the normal zen 5 tie or lose to Raptor/Arrow lake. They also allow much lower idle power use, very noticeable on mobile, AMD has nothing that can touch the likes of Lunar lake.

 

[Puiu]

But he literally specified desktops and servers.

They absolutely do need higher clocks speeds. It's dumb to think otherwise. Not all tasks can be serialised, you still need powerful cores. You can make 200VMs on a single CPU, but a single bespoke task that has just a single thread will require a fast core.

 

[noblody]

IPC in general terms is helpful-- but the traditional manner of increasing that is a longer pipeline, which means higher energy consumption.

Increasing the IPC is done via wider cores (more operations in parallel) and shorter pipelines (less clocks spent per instruction). The longer pipeline is usually a way of achieving higher operating frequencies.

 

[Endymio]

They absolutely do need higher clocks speeds. It's dumb to think otherwise. Not all tasks can be serialised.

You fail to understand that a server processor is generally running up to 100 tasks on every core, and thus, long before it can finish an "unserializable" task, it has been forced to perform hundreds of highly expensive context switches, and each individual switch can cost up to 10,000 clocks directly, and 10x or more indirectly. A heavily-loaded server CPU can spend 50% or more its time in context switches, and recovering from them.

Now, a 10% increase in clock speeds means a 10% performance boost. But 10% more cores not only gives you that 10% boost, but it also reduces context switching on other cores, for a superlinear performance gain that desktop cpus generally don't see.

If you achieve higher clocks through a smaller process node at the same or lower voltage they're essentially free: why not take them? But today, they generally require longer pipelines or other means which reduce power efficiency, which is far more important for a server chip than desktop.

Increasing the IPC is done via wider cores (more operations in parallel) and shorter pipelines (less clocks spent per instruction). The longer pipeline is usually a way of achieving higher operating frequencies.

Absolutely correct; I was still thinking of clock speeds when I typed my response.