In a nutshell: The PCI Special Interest Group (PCI-SIG), the organization responsible for defining PCI Express standards, is nearing completion of the PCIe 7.0 specification. If everything proceeds as planned, this next-generation, ultra-high-speed data pipeline will be officially ratified by the end of the year.
PCI-SIG has just released revision 0.7 of the draft specifications, and members are likely scrutinizing every detail. There have been minimal changes since the 0.5 version released last April, which is a positive sign that the core technology is stable. Assuming no major issues arise, 2025 could be the year PCIe 7.0 is officially ratified.
To set the stage, it's 2025, and AI advancements have accelerated the need for increased bandwidth. Machine learning workloads are becoming more demanding, creating a significant need for high-capacity data pipelines connecting processors, memory, and storage. The interconnect has emerged as a critical bottleneck that must be addressed.
PCIe 7.0 aims to eliminate the bottleneck by doubling per-lane throughput once again. While PCIe 5.0 maxed out at a relatively modest 4GB/s per lane, PCIe 7.0 will deliver an impressive 16GB/s per lane.
If you're wondering why PCI-SIG is already discussing PCIe 7.0 when PCIe 5.0 has only recently become widespread on current PCs, the answer lies in the gap – PCIe 6.0, finalized in 2022, comes between the two. Meanwhile, PCIe 5.0 made its debut in 2019.
The wide gaps between the release of a new PCIe specification and actual product availability are due to the real-world testing, verification, and platform integration processes, which can take several years to complete.
One of the biggest challenges with these latest specs is cooling. Higher bandwidths and faster transfer rates have inevitably led to increased heat generation, prompting solutions that were once unthinkable. For example, Intel is working on a new driver for Linux that will allow users to selectively reduce PCIe link speeds when thermal levels get too high.
Given these factors, don't expect PCIe 7.0 products to hit the market anytime soon. As a reminder, PCIe 6.0 devices are just beginning interoperability testing, despite having been finalized three years ago.
PCIe 7.0 spec nearing completion, promising 16GB/s per lane bandwidth
