Samsung shows off new roadmap with fabrication down to 3nm

By Greg S ยท 7 replies
May 23, 2018
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  1. At Samsung Foundry Forum 2018, the semiconductor giant has revealed a series of new process technology improvements targeting high-performance computing and connected devices.

    Samsung's new roadmap focuses on providing its customers more energy efficient systems for system-on-chip devices targeting a wide variety of industries. "The trend toward a smarter, connected world has the industry demanding more from silicon providers," says Charlie Bae, executive vice president and head of Foundry Sales & Marketing.

    The next process technology to arrive from Samsung is 7nm Low Power Plus based on EUV lithography. Samsung's 7LPP solution will go into production during the second half of this year and will be scaled up during the first half of 2019.

    Moving smaller still, 5nm Low Power Early will be a scaled down version of 7LPP with improved power consumption figures. After 5nm, Samsung is targeting 4nm Low Power Early and Low Power Plus. At 4nm, this will be the last generation to use FinFET technology. This small step between 5nm and 4nm is designed to allow for easy conversion while still achieving performance improvements.

    The last stop on Samsung's roadmap is 3nm Gate-All-Around Early/Plus. Using the newer type of transistor allows for physical scaling issues with FinFETs to be solved. Samsung is calling their gate-all-around devices MBCFETs, or rather Multi-Bridge-Channel FETs. Each uses a nano-sheet to improve control of the gate.

    It will be a few years before Samsung or any of its competitors are able to scale process technologies all the way down to 3nm, but it is important to know that certain key problems associated with scaling are already being addressed. Early estimates put 3nm fabrication being ready in 2022.

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  2. VitalyT

    VitalyT Russ-Puss Posts: 3,882   +2,237

    Along came the Ant-Man :)))

    And we were told that 7nm was the last theoretically achievable, just 5 years ago.
     
    Whitefyre likes this.
  3. seeprime

    seeprime TS Maniac Posts: 203   +171

    With existing fab tech, 7nm was the limit at the time. If perfection of quantum wires becomes possible, we will have reached the atomic limit of one atom's width. This is not likely to happen for at least a couple of decades.
     
  4. MasterMace

    MasterMace TS Rookie

    Who is giving these early estimates? They think they can do 5 node changes in 4 years?
     
    SirChocula likes this.
  5. ThanosPAS

    ThanosPAS TS Booster Posts: 54   +16

    Let's say then at least 2024+
     
  6. Puiu

    Puiu TS Evangelist Posts: 2,899   +1,315

    It's not about making the node changes but having working prototypes. It won't be "production ready" anytime soon :D
     
    Greg S likes this.
  7. Lounds

    Lounds TS Enthusiast Posts: 59   +29

    They're going to have to come up with something sooner than that otherwise CPU technology is going to stagnant by 2025.
     
  8. Mr Majestyk

    Mr Majestyk TS Enthusiast Posts: 54   +26

    How on earth do you stop quantum tunneling of electrons at 5nm or less. The wavepacket is wider than the traces and I assume you can't make infinite potential walls to stop the tunneling.
     

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