The big picture: Intel unveiled its next-generation Core Ultra 300 "Panther Lake" laptop processors on the opening day of Computex 2025. Built on the company's 18A process node, the chips use a five-tile design that includes Cougar Cove performance cores, Darkmont and Skymont efficient cores, and an Xe3 Celestial integrated GPU.
Intel did not share performance benchmarks for the new chips but claimed they will deliver Arrow Lake-level performance with Lunar Lake-level efficiency. The company also confirmed that the processors will include next-gen XMX integrated graphics matching the performance of Lunar Lake's GPU.
The exhibition included a Panther Lake laptop running DaVinci Resolve, showcasing on-device AI video processing. The laptop processor had 16 cores, though Intel withheld detailed specifications. Online speculation suggests a configuration of four performance cores, eight efficient cores, and four low-power efficient cores.
The demo CPU featured a 2.0GHz base clock, 3.0GHz boost clock, 1.6MB of L1 cache, 24MB of L2 cache, and 18MB of L3 cache. Both the laptop and processor were engineering samples, with retail units expected to enter production in the second half of 2025 ahead of an early 2026 OEM launch.
Another showcase at the event featured Microsoft's new AI-powered Clippy assistant, highlighting Panther Lake's AI processing capabilities. In the presentation, an Intel representative used Clippy to generate game code in Python. However, Intel did not provide benchmark data to illustrate the chip's performance.
The Panther Lake chips at the event ran on Reference Validation Platforms – Intel's term for custom boards used to validate new processor microarchitectures. The company also displayed a development kit similar to the one shown alongside Lunar Lake last year.
Previous leaks suggested that Panther Lake would include at least four SKUs. The flagship model features four P-cores, eight E-cores, four LP-E cores, and 12 Xe3 integrated GPU cores. It has a 45W PL1 rating and an 80W PL2 ceiling. The entry-level chip keeps four performance and four low-power efficiency cores but drops the standard efficiency cores, with a 15W PL1 and 54W PL2 rating.